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Searched refs:v_taps (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_transform.c130 if (data->taps.h_taps + data->taps.v_taps <= 2) { in setup_scaling_configuration()
141 SCL_V_NUM_OF_TAPS, data->taps.v_taps - 1); in setup_scaling_configuration()
164 if (data->taps.h_taps + data->taps.v_taps <= 2) { in dce60_setup_scaling_configuration()
177 SCL_V_NUM_OF_TAPS, data->taps.v_taps - 1); in dce60_setup_scaling_configuration()
315 dc_fixpt_from_int(data->taps.v_taps + 1)), in calculate_inits()
344 dc_fixpt_from_int(data->taps.v_taps + 1)), in dce60_calculate_inits()
451 coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert); in dce_transform_set_scaler()
461 data->taps.v_taps, in dce_transform_set_scaler()
466 data->taps.v_taps, in dce_transform_set_scaler()
538 coeffs_v = get_filter_coeffs_16p(data->taps.v_taps, data->ratios.vert); in dce60_transform_set_scaler()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/
H A Ddcn201_dpp.c226 if (in_taps->v_taps == 0) { in dpp201_get_optimal_number_of_taps()
228 scl_data->taps.v_taps = 8; in dpp201_get_optimal_number_of_taps()
230 scl_data->taps.v_taps = 4; in dpp201_get_optimal_number_of_taps()
232 scl_data->taps.v_taps = in_taps->v_taps; in dpp201_get_optimal_number_of_taps()
255 scl_data->taps.v_taps = 1; in dpp201_get_optimal_number_of_taps()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/
H A Ddml_top_display_cfg_types.h247 unsigned int v_taps; member
254 unsigned int v_taps; member
313 unsigned long v_taps; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_translation_helper.c431 plane->composition.scaler_info.plane0.v_taps = 1; in populate_dml21_dummy_plane_cfg()
433 plane->composition.scaler_info.plane1.v_taps = 0; in populate_dml21_dummy_plane_cfg()
573 if ((scaler_data->taps.h_taps > 1) || (scaler_data->taps.v_taps > 1) || in populate_dml21_plane_config_from_plane_state()
603 if (!scaler_data->taps.v_taps) { in populate_dml21_plane_config_from_plane_state()
604 plane->composition.scaler_info.plane0.v_taps = 1; in populate_dml21_plane_config_from_plane_state()
605 plane->composition.scaler_info.plane1.v_taps = 1; in populate_dml21_plane_config_from_plane_state()
607 plane->composition.scaler_info.plane0.v_taps = scaler_data->taps.v_taps; in populate_dml21_plane_config_from_plane_state()
608 plane->composition.scaler_info.plane1.v_taps = scaler_data->taps.v_taps_c; in populate_dml21_plane_config_from_plane_state()
/linux/drivers/gpu/drm/amd/display/dc/sspl/
H A Ddc_spl_isharp_filters.c553 SPL_NAMESPACE(spl_dscl_get_blur_scale_coeffs_64p(data->taps.v_taps)); in SPL_NAMESPACE()
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Ddce_calcs.h397 struct bw_fixed v_taps[maximum_number_of_surfaces]; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_translation_helper.c1119 if (!scaler_data->taps.v_taps) { in populate_dml_plane_cfg_from_plane_state()
1123 out->VTaps[location] = scaler_data->taps.v_taps; in populate_dml_plane_cfg_from_plane_state()
1258 out->WritebackVTaps[location] = wb_info->dwb_params.scaler_taps.v_taps > 0 ? in populate_dml_writeback_cfg_from_stream_state()
1259 wb_info->dwb_params.scaler_taps.v_taps : 1; in populate_dml_writeback_cfg_from_stream_state()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c6809 double v_taps = p->display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_taps; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() local
6810 double v_taps_c = p->display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_taps; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6815 …rSize / LBBitPerPixel / ((double)p->SwathWidthY[k] / math_max2(h_ratio, 1.0)), 1)) - (v_taps - 1)); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6823 DML_LOG_VERBOSE("DML::%s: k=%u, VTaps = %f\n", __func__, k, v_taps); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
7464 myPipe->VTaps = display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_taps; in dml_core_ms_prefetch_check()
7465 myPipe->VTapsChroma = display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_taps; in dml_core_ms_prefetch_check()
8055 || display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_taps != 1.0)) { in dml_core_mode_support()
8057 …].composition.scaler_info.plane0.v_taps < 1.0 || display_cfg->plane_descriptors[k].composition.sca… in dml_core_mode_support()
8063 …caler_info.plane0.v_ratio > display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_taps in dml_core_mode_support()
8065 …k].composition.scaler_info.plane1.v_taps < 1 || display_cfg->plane_descriptors[k].composition.scal… in dml_core_mode_support()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Dcalcs_logger.h431 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] v_taps[%d]:%d", i, bw_fixed_to_int(data->v_taps[i])); in print_bw_calcs_data()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c1371 data->taps.v_taps, in calculate_inits_and_viewports()
1628 if (res && (pipe_ctx->plane_res.scl_data.taps.v_taps != temp.v_taps || in resource_build_scaling_params()
H A Ddc.c6880 …state->dpp[i].v_taps = dscl_data->taps.v_taps + 1; // dscl_prog_data.taps stores (taps - 1), so ad… in dc_capture_register_software_state()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1683 pipes[pipe_cnt].pipe.scale_taps.vtaps = scl->taps.v_taps; in dcn20_populate_dml_pipes_from_context()
2512 dout_wb.wb_vtaps_luma = wb_info->dwb_params.scaler_taps.v_taps; in dcn201_populate_dml_writeback_from_context_fpu()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h3063 uint32_t v_taps; /* SCL_TAP_CONTROL->SCL_V_NUM_TAPS from taps.v_taps */ member
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c10753 wb_info->dwb_params.scaler_taps.v_taps = 1; in dm_set_writeback()