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/linux/net/ceph/
H A Dmessenger_v2.c114 iov_iter_is_discard(&con->v2.in_iter) ? "discard" : "need", in ceph_tcp_recv()
115 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
116 ret = do_recvmsg(con->sock, &con->v2.in_iter); in ceph_tcp_recv()
118 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
201 iov_iter_count(&con->v2.out_iter), con->v2.out_iter_sendpage); in ceph_tcp_send()
202 if (con->v2.out_iter_sendpage) in ceph_tcp_send()
203 ret = do_try_sendpage(con->sock, &con->v2.out_iter); in ceph_tcp_send()
205 ret = do_sendmsg(con->sock, &con->v2.out_iter); in ceph_tcp_send()
207 iov_iter_count(&con->v2.out_iter)); in ceph_tcp_send()
213 BUG_ON(con->v2.in_kvec_cnt >= ARRAY_SIZE(con->v2.in_kvecs)); in add_in_kvec()
[all …]
/linux/arch/loongarch/lib/
H A Dxor_template.c18 const unsigned long * __restrict v2)
25 LD_AND_XOR_LINE(v2)
27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory"
31 v2 += LINE_WIDTH / sizeof(unsigned long);
37 const unsigned long * __restrict v2,
45 LD_AND_XOR_LINE(v2)
48 : : [v1] "r"(v1), [v2] "r"(v2), [v3] "r"(v3) : "memory"
52 v2 += LINE_WIDTH / sizeof(unsigned long);
59 const unsigned long * __restrict v2,
68 LD_AND_XOR_LINE(v2)
[all …]
/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_BB.c220 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_AGC_TAB() local
224 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
233 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
234 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
236 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
237 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
239 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
241 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
249 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
255 odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
[all …]
H A DHalHWImg8723B_MAC.c190 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_MAC_REG() local
194 odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
203 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
204 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_MAC_REG()
206 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
207 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
209 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
211 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
217 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
222 odm_ConfigMAC_8723B(pDM_Odm, v1, (u8)v2); in ODM_ReadAndConfig_MP_8723B_MAC_REG()
[all …]
H A DHalHWImg8723B_RF.c221 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_RadioA() local
225 odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); in ODM_ReadAndConfig_MP_8723B_RadioA()
234 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
235 } else if (!CheckPositive(pDM_Odm, v1, v2)) { in ODM_ReadAndConfig_MP_8723B_RadioA()
237 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
238 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
240 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
242 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
250 READ_NEXT_PAIR(v1, v2, i); in ODM_ReadAndConfig_MP_8723B_RadioA()
256 odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); in ODM_ReadAndConfig_MP_8723B_RadioA()
[all …]
/linux/arch/s390/include/asm/
H A Dfpu-insn.h146 static __always_inline void fpu_vab(u8 v1, u8 v2, u8 v3) in fpu_vab() argument
150 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vab()
154 static __always_inline void fpu_vcksm(u8 v1, u8 v2, u8 v3) in fpu_vcksm() argument
158 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vcksm()
162 static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) in fpu_vesravb() argument
166 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vesravb()
170 static __always_inline void fpu_vgfmag(u8 v1, u8 v2, u8 v3, u8 v4) in fpu_vgfmag() argument
174 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3), [v4] "I" (v4) in fpu_vgfmag()
178 static __always_inline void fpu_vgfmg(u8 v1, u8 v2, u8 v3) in fpu_vgfmg() argument
182 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vgfmg()
[all …]
H A Dfpu-insn-asm.h100 .ifc \vxr,%v2
219 .macro RXB rxb v1 v2=0 v3=0 v4=0
224 .if \v2 & 0x10
246 .macro MRXB m v1 v2=0 v3=0 v4=0
248 RXB rxb, \v1, \v2, \v3, \v4
264 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
265 MRXB \m, \v1, \v2, \v3, \v4
308 .macro VLR v1, v2
310 VX_NUM v2, \v2
311 .word 0xE700 | ((v1&15) << 4) | (v2&15)
[all …]
/linux/drivers/char/mwave/
H A Dmwavedd.h84 #define PRINTK_3(f,s,v1,v2) \ argument
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
[all …]
/linux/Documentation/arch/powerpc/
H A Disa-versions.rst14 Power8 Power ISA v2.07
15 e6500 Power ISA v2.06 with some exceptions
16 e5500 Power ISA v2.06 with some exceptions, no Altivec
17 Power7 Power ISA v2.06
18 Power6 Power ISA v2.05
19 PA6T Power ISA v2.04
20 Cell PPU - Power ISA v2.02 with some minor exceptions
22 Power5++ Power ISA v2.04 (no VMX)
23 Power5+ Power ISA v2.03
24 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
[all …]
/linux/arch/arm64/lib/
H A Dxor-neon.c19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
26 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_2()
32 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_2()
48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
55 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_3()
61 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_3()
67 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_3()
86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
93 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_4()
99 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_4()
[all …]
/linux/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
17 vmr v2,v1
22 vand v2,v2,v1
27 vand v2,v2,v1
32 vand v2,v2,v1
37 vand v2,v2,v1
42 vand v2,v2,v1
47 vand v2,v2,v1
52 vand v2,v2,v1
57 vand v2,v2,v1
[all …]
/linux/include/pcmcia/
H A Ddevice_id.h29 #define PCMCIA_DEVICE_PROD_ID2(v2, vh2) { \ argument
31 .prod_id = { NULL, (v2), NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument
42 .prod_id = { (v1), (v2), NULL, NULL }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
64 #define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \ argument
68 .prod_id = { (v1), (v2), NULL, (v4) }, \
78 #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ argument
83 .prod_id = { (v1), (v2), (v3), (v4) }, \
[all …]
/linux/arch/powerpc/lib/
H A Dxor_vmx.c57 DEFINE(v2); in __xor_altivec_2()
62 LOAD(v2); in __xor_altivec_2()
63 XOR(v1, v2); in __xor_altivec_2()
67 v2 += 4; in __xor_altivec_2()
77 DEFINE(v2); in __xor_altivec_3()
83 LOAD(v2); in __xor_altivec_3()
85 XOR(v1, v2); in __xor_altivec_3()
90 v2 += 4; in __xor_altivec_3()
102 DEFINE(v2); in __xor_altivec_4()
109 LOAD(v2); in __xor_altivec_4()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
75 FN(reg, f2), v2,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
81 FN(reg, f2), v2,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
89 FN(reg, f2), v2,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
98 FN(reg, f2), v2,\
[all …]
/linux/lib/
H A Dxxhash.c111 uint32_t v2 = seed + PRIME32_2; in xxh32() local
118 v2 = xxh32_round(v2, get_unaligned_le32(p)); in xxh32()
126 h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + in xxh32()
181 uint64_t v2 = seed + PRIME64_2; in xxh64() local
188 v2 = xxh64_round(v2, get_unaligned_le64(p)); in xxh64()
196 h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + in xxh64()
199 h64 = xxh64_merge_round(h64, v2); in xxh64()
249 state.v2 = seed + PRIME32_2; in xxh32_reset()
263 state.v2 = seed + PRIME64_2; in xxh64_reset()
295 state->v2 = xxh32_round(state->v2, get_unaligned_le32(p32)); in xxh32_update()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588j.dtsi11 compatible = "operating-points-v2";
33 compatible = "operating-points-v2";
59 compatible = "operating-points-v2";
85 compatible = "operating-points-v2";
115 operating-points-v2 = <&cluster1_opp_table>;
119 operating-points-v2 = <&cluster1_opp_table>;
123 operating-points-v2 = <&cluster2_opp_table>;
127 operating-points-v2 = <&cluster2_opp_table>;
131 operating-points-v2 = <&cluster0_opp_table>;
135 operating-points-v2 = <&cluster0_opp_table>;
[all …]
H A Drk3588-opp.dtsi5 compatible = "operating-points-v2";
37 compatible = "operating-points-v2";
78 compatible = "operating-points-v2";
119 compatible = "operating-points-v2";
157 operating-points-v2 = <&cluster1_opp_table>;
161 operating-points-v2 = <&cluster1_opp_table>;
165 operating-points-v2 = <&cluster2_opp_table>;
169 operating-points-v2 = <&cluster2_opp_table>;
173 operating-points-v2 = <&cluster0_opp_table>;
177 operating-points-v2 = <&cluster0_opp_table>;
[all …]
H A Drk3399-op1.dtsi10 compatible = "operating-points-v2";
45 compatible = "operating-points-v2";
88 compatible = "operating-points-v2";
117 compatible = "operating-points-v2";
139 operating-points-v2 = <&cluster0_opp>;
143 operating-points-v2 = <&cluster0_opp>;
147 operating-points-v2 = <&cluster0_opp>;
151 operating-points-v2 = <&cluster0_opp>;
155 operating-points-v2 = <&cluster1_opp>;
159 operating-points-v2 = <&cluster1_opp>;
[all …]
H A Drk3399-t.dtsi11 compatible = "operating-points-v2";
34 compatible = "operating-points-v2";
69 compatible = "operating-points-v2";
91 operating-points-v2 = <&cluster0_opp>;
95 operating-points-v2 = <&cluster0_opp>;
99 operating-points-v2 = <&cluster0_opp>;
103 operating-points-v2 = <&cluster0_opp>;
107 operating-points-v2 = <&cluster1_opp>;
111 operating-points-v2 = <&cluster1_opp>;
115 operating-points-v2 = <&gpu_opp_table>;
H A Drk3399.dtsi10 compatible = "operating-points-v2";
41 compatible = "operating-points-v2";
80 compatible = "operating-points-v2";
110 operating-points-v2 = <&cluster0_opp>;
114 operating-points-v2 = <&cluster0_opp>;
118 operating-points-v2 = <&cluster0_opp>;
122 operating-points-v2 = <&cluster0_opp>;
126 operating-points-v2 = <&cluster1_opp>;
130 operating-points-v2 = <&cluster1_opp>;
134 operating-points-v2 = <&gpu_opp_table>;
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-bus.dtsi14 operating-points-v2 = <&bus_g2d_400_opp_table>;
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
30 operating-points-v2 = <&bus_gscl_opp_table>;
38 operating-points-v2 = <&bus_hevc_opp_table>;
46 operating-points-v2 = <&bus_g2d_400_opp_table>;
54 operating-points-v2 = <&bus_g2d_400_opp_table>;
62 operating-points-v2 = <&bus_g2d_400_opp_table>;
70 operating-points-v2 = <&bus_hevc_opp_table>;
78 operating-points-v2 = <&bus_hevc_opp_table>;
86 operating-points-v2 = <&bus_noc2_opp_table>;
[all …]
/linux/arch/mips/kernel/
H A Dr4k-bugs64.c44 void mult_sh_align_mod(long *v1, long *v2, long *w, in mult_sh_align_mod() argument
115 *v2 = lv2; in mult_sh_align_mod()
121 long v1[8], v2[8], w[8]; in check_mult_sh() local
135 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); in check_mult_sh()
136 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); in check_mult_sh()
137 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); in check_mult_sh()
138 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); in check_mult_sh()
139 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); in check_mult_sh()
140 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); in check_mult_sh()
141 mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); in check_mult_sh()
[all …]
/linux/Documentation/userspace-api/gpio/
H A Dchardev.rst7 This is latest version (v2) of the character device API, as defined in
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
43 Lines are requested from the chip using gpio-v2-get-line-ioctl.rst
58 Get Line <gpio-v2-get-line-ioctl>
60 Get Line Info <gpio-v2-get-lineinfo-ioctl>
61 Watch Line Info <gpio-v2-get-lineinfo-watch-ioctl>
63 Read Line Info Changed Events <gpio-v2-lineinfo-changed-read>
65 .. _gpio-v2-line-request:
[all …]
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h65 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
68 FN(reg, f2), v2)
70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
73 FN(reg, f2), v2, \
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
79 FN(reg, f2), v2, \
92 #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ argument
95 FN(reg, f2), v2)
97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ argument
100 FN(reg, f2), v2, \
[all …]
/linux/arch/arm64/crypto/
H A Daes-ce-ccm-core.S65 ld1 {v2.16b}, [x1], #16 /* load next input block */
67 eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
68 eor v6.16b, v1.16b, v2.16b /* xor with crypted ctr */
70 eor v2.16b, v2.16b, v1.16b /* xor with crypted ctr */
71 eor v6.16b, v2.16b, v5.16b /* final round enc */
73 eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
96 ld1 {v2.16b}, [x1] /* load a full block of input */
98 eor v7.16b, v2.16b, v1.16b /* encrypt partial input block */
99 bif v2.16b, v7.16b, v22.16b /* select plaintext */
101 tbl v2.16b, {v2.16b}, v9.16b /* copy plaintext to start of v2 */
[all …]

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