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/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_auto.c40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
/linux/drivers/media/platform/nxp/
H A Dimx-pxp.h19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
26 (((v) << 29) & BM_PXP_CTRL_RSVD4)
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
[all …]
/linux/rust/helpers/
H A Datomic.c20 rust_helper_atomic_read(const atomic_t *v) in rust_helper_atomic_read() argument
22 return atomic_read(v); in rust_helper_atomic_read()
26 rust_helper_atomic_read_acquire(const atomic_t *v) in rust_helper_atomic_read_acquire() argument
28 return atomic_read_acquire(v); in rust_helper_atomic_read_acquire()
32 rust_helper_atomic_set(atomic_t *v, int i) in rust_helper_atomic_set() argument
34 atomic_set(v, i); in rust_helper_atomic_set()
38 rust_helper_atomic_set_release(atomic_t *v, int i) in rust_helper_atomic_set_release() argument
40 atomic_set_release(v, i); in rust_helper_atomic_set_release()
44 rust_helper_atomic_add(int i, atomic_t *v) in rust_helper_atomic_add() argument
46 atomic_add(i, v); in rust_helper_atomic_add()
[all …]
/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
H A Drockchip_vpu2_hw_mpeg2_dec.c23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
H A Dhantro_g1_mpeg2_dec.c25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
34 #define G1_REG_DEC_IN_ENDIAN(v) ((v) ? BIT(9) : 0) argument
[all …]
/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument
123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument
133 #define SUN6I_ISP_AE_CFG_LOW_BRI_TH(v) ((v) & GENMASK(11, 0)) argument
[all …]
/linux/sound/soc/qcom/
H A Dlpass-lpaif-reg.h11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
78 #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ argument
79 (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port))
[all …]
/linux/drivers/iio/adc/
H A Dstm32-dfsdm.h52 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) argument
54 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) argument
56 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) argument
58 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) argument
60 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) argument
62 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) argument
64 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) argument
66 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) argument
68 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v) argument
70 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v) argument
[all …]
/linux/drivers/gpu/host1x/hw/
H A Dhw_host1x01_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x07_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x08_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x06_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x02_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x05_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
H A Dhw_host1x04_uclass.h48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
/linux/arch/sh/mm/
H A Dflush-sh4.c16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
/linux/drivers/md/
H A Ddm-verity-target.c65 struct dm_verity *v; member
100 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
102 return dm_target_offset(v->ti, bi_sector); in verity_map_sector()
111 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
114 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
117 int verity_hash(struct dm_verity *v, struct dm_verity_io *io, in verity_hash() argument
123 if (likely(v->use_sha256_lib)) { in verity_hash()
130 *ctx = *v->initial_hashstate.sha256; in verity_hash()
137 desc->tfm = v->shash_tfm; in verity_hash()
138 if (unlikely(v->initial_hashstate.shash == NULL)) { in verity_hash()
[all …]
/linux/arch/x86/lib/
H A Datomic64_386_32.S27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
/linux/tools/testing/selftests/bpf/progs/
H A Dmap_kptr_fail.c27 struct map_value *v; in size_not_bpf_dw() local
30 v = bpf_map_lookup_elem(&array_map, &key); in size_not_bpf_dw()
31 if (!v) in size_not_bpf_dw()
34 *(u32 *)&v->unref_ptr = 0; in size_not_bpf_dw()
42 struct map_value *v; in non_const_var_off() local
45 v = bpf_map_lookup_elem(&array_map, &key); in non_const_var_off()
46 if (!v) in non_const_var_off()
52 *(u64 *)((void *)v + id) = 0; in non_const_var_off()
61 struct map_value *v; in non_const_var_off_kptr_xchg() local
64 v = bpf_map_lookup_elem(&array_map, &key); in non_const_var_off_kptr_xchg()
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dregs-scaler.h206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
238 #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) argument
240 #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) argument
244 #define SCALER_SRC_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) argument
246 #define SCALER_SRC_WH_SET_HEIGHT(v) SCALER_SET(v, 13, 0) argument
250 #define SCALER_SRC_C_POS_SET_CH_POS(v) SCALER_SET(v, 31, 16) argument
252 #define SCALER_SRC_C_POS_SET_CV_POS(v) SCALER_SET(v, 15, 0) argument
[all …]
/linux/sound/soc/codecs/
H A Dcs43130.h379 struct u16_fract v; member
384 { 22579200, 32000, .v = { 10, 441, }, },
385 { 22579200, 44100, .v = { 1, 32, }, },
386 { 22579200, 48000, .v = { 5, 147, }, },
387 { 22579200, 88200, .v = { 1, 16, }, },
388 { 22579200, 96000, .v = { 10, 147, }, },
389 { 22579200, 176400, .v = { 1, 8, }, },
390 { 22579200, 192000, .v = { 20, 147, }, },
391 { 22579200, 352800, .v = { 1, 4, }, },
392 { 22579200, 384000, .v = { 40, 147, }, },
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
111 ((v) ? BIT(4) : 0)
[all …]
/linux/tools/perf/util/arm-spe-decoder/
H A Darm-spe-pkt-decoder.h73 #define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0)) argument
74 #define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48) argument
76 #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) argument
77 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) argument
78 #define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) argument
79 #define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56) argument
126 #define SPE_OP_PKT_OTHER_SUBCLASS_OTHER(v) (((v) & GENMASK_ULL(7, 3)) == 0x0) argument
127 #define SPE_OP_PKT_OTHER_SUBCLASS_SVE(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8) argument
128 #define SPE_OP_PKT_OTHER_SUBCLASS_SME(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x88) argument
140 #define SPE_OP_PKG_SME_ETS(v) (128 << (FIELD_GET(GENMASK_ULL(6, 4), (v)) << 1 | \ argument
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/linux/drivers/iommu/
H A Dmsm_iommu_hw-8xxx.h20 #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) argument
28 #define SET_GLOBAL_FIELD(b, r, F, v) \ argument
29 SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v))
30 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument
31 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v))
35 #define SET_FIELD(addr, mask, shift, v) \ argument
38 writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\
84 #define SET_M2VCBR_N(b, N, v) SET_GLOBAL_REG_N(M2VCBR_N, N, (b), (v)) argument
85 #define SET_CBACR_N(b, N, v) SET_GLOBAL_REG_N(CBACR_N, N, (b), (v)) argument
86 #define SET_TLBRSW(b, v) SET_GLOBAL_REG(TLBRSW, (b), (v)) argument
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