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Searched refs:uop (Results 1 – 25 of 26) sorted by relevance

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/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaPseudoObject.cpp127 if (UnaryOperator *uop = dyn_cast<UnaryOperator>(e)) { in rebuild() local
128 assert(uop->getOpcode() == UO_Extension); in rebuild()
129 e = rebuild(uop->getSubExpr()); in rebuild()
131 S.Context, e, uop->getOpcode(), uop->getType(), uop->getValueKind(), in rebuild()
132 uop->getObjectKind(), uop->getOperatorLoc(), uop->canOverflow(), in rebuild()
1561 if (UnaryOperator *uop = dyn_cast<UnaryOperator>(syntax)) { in recreateSyntacticForm() local
1562 Expr *op = stripOpaqueValuesFromPseudoObjectRef(SemaRef, uop->getSubExpr()); in recreateSyntacticForm()
1564 SemaRef.Context, op, uop->getOpcode(), uop->getType(), in recreateSyntacticForm()
1565 uop->getValueKind(), uop->getObjectKind(), uop->getOperatorLoc(), in recreateSyntacticForm()
1566 uop->canOverflow(), SemaRef.CurFPFeatureOverrides()); in recreateSyntacticForm()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SchedPredicates.td64 // A predicate to check for COND_A and COND_BE CMOVs which have an extra uop
76 // A predicate to check for COND_A and COND_BE SETCCs which have an extra uop
H A DX86ScheduleSLM.td82 // A folded store needs a cycle on MEC_RSV for the store data (using the same uop),
H A DX86SchedHaswell.td1837 // a single uop. It does not apply to the GR8 encoding. And only applies to the
1866 // CMOVs that use both Z and C flag require an extra uop.
1892 // SETCCs that use both Z and C flag require an extra uop.
H A DX86SchedSandyBridge.td1209 // CMOVs that use both Z and C flag require an extra uop.
1235 // SETCCs that use both Z and C flag require an extra uop.
H A DX86SchedSkylakeClient.td1667 // CMOVs that use both Z and C flag require an extra uop.
1693 // SETCCs that use both Z and C flag require an extra uop.
H A DX86SchedBroadwell.td1602 // CMOVs that use both Z and C flag require an extra uop.
1628 // SETCCs that use both Z and C flag require an extra uop.
H A DX86ScheduleBtVer2.td184 // instructions don't need an extra uop. ALU RMW operations don't seem to
H A DX86SchedSkylakeServer.td2464 // CMOVs that use both Z and C flag require an extra uop.
2490 // SETCCs that use both Z and C flag require an extra uop.
H A DX86SchedIceLake.td2494 // CMOVs that use both Z and C flag require an extra uop.
2520 // SETCCs that use both Z and C flag require an extra uop.
H A DX86.td727 "Indicates that the BEXTR instruction is implemented as a single uop "
/freebsd/sys/amd64/include/xen/
H A Dhypercall.h307 unsigned int cmd, void *uop, unsigned int count) in HYPERVISOR_grant_table_op() argument
309 return _hypercall3(int, grant_table_op, cmd, uop, count); in HYPERVISOR_grant_table_op()
/freebsd/sys/i386/include/xen/
H A Dhypercall.h295 unsigned int cmd, void *uop, unsigned int count) in HYPERVISOR_grant_table_op() argument
297 return _hypercall3(int, grant_table_op, cmd, uop, count); in HYPERVISOR_grant_table_op()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td224 class I16_BPushPop<bits<11> op, bits<2> uop, dag out, dag ins, string opstr> :
229 let Inst{1,0} = uop;
/freebsd/sys/contrib/openzfs/module/lua/
H A Dlparser.c1043 UnOpr uop; in subexpr() local
1045 uop = getunopr(ls->t.token); in subexpr()
1046 if (uop != OPR_NOUNOPR) { in subexpr()
1050 luaK_prefix(ls->fs, uop, v, line); in subexpr()
/freebsd/contrib/lua/src/
H A Dlparser.c1261 UnOpr uop; in subexpr() local
1263 uop = getunopr(ls->t.token); in subexpr()
1264 if (uop != OPR_NOUNOPR) { /* prefix (unary) operator? */ in subexpr()
1268 luaK_prefix(ls->fs, uop, v, line); in subexpr()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSchedule.td19 // 2 | Rn: 1 Rm: 4 Rs: 4 | uop T0, Rm, Rs - P01 - 3
H A DARMScheduleA57.td177 // if so adds 2 cyc to latency, 1 uop, 1 res cycle for A57UnitB
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedAmpere1.td39 // one uop per cycle, while the memory schedulers can each issue one load
570 // which are a single uop, and for extended registers, which have full flexibility
H A DAArch64SchedAmpere1B.td526 // which are a single uop, and for extended registers, which have full flexibility
H A DAArch64SchedFalkorDetails.td9 // This file defines the uop and latency details for the machine model for the
H A DAArch64SchedKryoDetails.td9 // This file defines the uop and latency details for the machine model for the
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExprAgg.cpp1319 } else if (const UnaryOperator *uop = dyn_cast<UnaryOperator>(E)) { in isBlockVarRef() local
1320 return isBlockVarRef(uop->getSubExpr()); in isBlockVarRef()
H A DCGCall.cpp4378 if (const UnaryOperator *uop = dyn_cast<UnaryOperator>(E->IgnoreParens())) in maybeGetUnaryAddrOfOperand() local
4379 if (uop->getOpcode() == UO_AddrOf) in maybeGetUnaryAddrOfOperand()
4380 return uop->getSubExpr(); in maybeGetUnaryAddrOfOperand()
/freebsd/sys/dev/cxgbe/
H A Dt4_main.c12811 set_offload_policy(struct adapter *sc, struct t4_offload_policy *uop) in set_offload_policy() argument
12823 if (uop->nrules == 0) { in set_offload_policy()
12827 } else if (uop->nrules > 256) { /* arbitrary */ in set_offload_policy()
12833 op->nrules = uop->nrules; in set_offload_policy()
12836 rc = copyin(uop->rule, op->rule, len); in set_offload_policy()

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