| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | umc_v8_7.c | 44 uint32_t umc_inst, in get_umc_v8_7_reg_offset() argument
47 return adev->umc.channel_offs*ch_inst + UMC_8_INST_DIST*umc_inst; in get_umc_v8_7_reg_offset()
51 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_query_correctable_error_count() argument
58 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_correctable_error_count()
70 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_querry_uncorrectable_error_count() argument
77 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
95 uint32_t umc_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local
101 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v8_7_ecc_info_query_ras_error_count()
103 umc_inst, ch_inst, in umc_v8_7_ecc_info_query_ras_error_count()
106 umc_inst, ch_inst, in umc_v8_7_ecc_info_query_ras_error_count()
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| H A D | umc_v6_7.c | 47 uint32_t umc_inst, in get_umc_v6_7_reg_offset() argument
50 uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst; in get_umc_v6_7_reg_offset()
54 umc_inst = index / 4; in get_umc_v6_7_reg_offset()
57 return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst; in get_umc_v6_7_reg_offset()
95 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_query_correctable_error_count() argument
104 umc_inst, ch_inst); in umc_v6_7_ecc_info_query_correctable_error_count()
106 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_correctable_error_count()
119 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_ecc_info_query_correctable_error_count()
137 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_querry_uncorrectable_error_count() argument
146 umc_inst, ch_inst); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
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| H A D | umc_v8_10.c | 72 uint32_t umc_inst, in get_umc_v8_10_reg_offset() argument
75 return adev->umc.channel_offs * ch_inst + UMC_8_INST_DIST * umc_inst + in get_umc_v8_10_reg_offset()
80 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_clear_error_count_per_channel() argument
85 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_clear_error_count_per_channel()
144 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_ecc_error_count() argument
149 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_query_ecc_error_count()
207 uint32_t ch_inst, uint32_t umc_inst, in umc_v8_10_convert_error_address() argument
218 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_convert_error_address()
240 retired_page_addr, channel_index, umc_inst); in umc_v8_10_convert_error_address()
245 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_error_address() argument
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| H A D | umc_v8_14.c | 31 uint32_t umc_inst, in get_umc_v8_14_reg_offset() argument
34 return adev->umc.channel_offs * ch_inst + UMC_V8_14_INST_DIST * umc_inst; in get_umc_v8_14_reg_offset()
38 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_clear_error_count_per_channel() argument
43 get_umc_v8_14_reg_offset(adev, umc_inst, ch_inst); in umc_v8_14_clear_error_count_per_channel()
93 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_query_error_count_per_channel() argument
98 get_umc_v8_14_reg_offset(adev, umc_inst, ch_inst); in umc_v8_14_query_error_count_per_channel()
120 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_err_cnt_init_per_channel() argument
126 get_umc_v8_14_reg_offset(adev, umc_inst, ch_inst); in umc_v8_14_err_cnt_init_per_channel()
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| H A D | amdgpu_umc.c | 34 uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_convert_error_address() argument
39 err_data, err_addr, ch_inst, umc_inst); in amdgpu_umc_convert_error_address()
51 uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_page_retirement_mca() argument
76 ch_inst, umc_inst); in amdgpu_umc_page_retirement_mca()
418 uint32_t umc_inst) in amdgpu_umc_fill_error_record() argument
436 err_rec->mcumc_id = umc_inst; in amdgpu_umc_fill_error_record()
448 uint32_t umc_inst; in amdgpu_umc_loop_all_aid() local
464 umc_inst = umc_node_inst % adev->umc.umc_inst_num; in amdgpu_umc_loop_all_aid()
468 node_inst, umc_inst, ch_inst); in amdgpu_umc_loop_all_aid()
469 ret = func(adev, node_inst, umc_inst, ch_inst, data); in amdgpu_umc_loop_all_aid()
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| H A D | umc_v6_7.h | 76 uint32_t ch_inst, uint32_t umc_inst);
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