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Searched refs:uint32 (Results 1 – 25 of 32) sorted by relevance

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/linux/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga3d_dx.h46 typedef uint32 SVGA3dInputClassification;
66 typedef uint32 SVGA3dFilter;
105 #define SVGA3D_DX_MAX_CONSTBUF_BINDING_SIZE (4096 * 4 * (uint32)sizeof(uint32))
107 typedef uint32 SVGA3dShaderResourceViewId;
108 typedef uint32 SVGA3dRenderTargetViewId;
109 typedef uint32 SVGA3dDepthStencilViewId;
110 typedef uint32 SVGA3dUAViewId;
112 typedef uint32 SVGA3dShaderId;
113 typedef uint32 SVGA3dElementLayoutId;
114 typedef uint32 SVGA3dSamplerId;
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H A Dsvga_reg.h46 typedef uint32 SVGAMobId;
237 #define SVGA_GMR_NULL ((uint32)-1)
238 #define SVGA_GMR_FRAMEBUFFER ((uint32)-2)
242 uint32 ppn;
243 uint32 numPages;
249 uint32 gmrId;
250 uint32 offset;
297 volatile uint32 errorOffset;
300 uint32 length;
305 uint32 mobOffset;
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H A Dsvga3d_cmd.h337 uint32 id;
338 uint32 size;
344 uint32 numMipLevels;
350 uint32 sid;
361 uint32 sid;
366 uint32 multisampleCount;
374 uint32 sid;
380 uint32 cid;
386 uint32 cid;
392 uint32 cid;
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H A Dsvga3d_types.h40 #define SVGA3D_INVALID_ID ((uint32)-1)
51 typedef uint32 SVGA3dResourceType;
54 typedef uint32 SVGA3dBool;
55 typedef uint32 SVGA3dColor;
57 typedef uint32 SVGA3dSurfaceId;
61 uint32 numerator;
62 uint32 denominator;
68 uint32 x;
69 uint32 y;
70 uint32 w;
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H A Dsvga_overlay.h65 uint32 cmdType;
66 uint32 streamId;
70 uint32 registerId;
71 uint32 value;
76 uint32 cmdType;
77 uint32 streamId;
82 uint32 command;
83 uint32 overlay;
97 uint32 regId;
98 uint32 value;
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H A Dvm_basic_types.h33 typedef u32 uint32; typedef
42 typedef uint32 PPN;
43 typedef uint32 PPN32;
H A Dsvga_escape.h48 uint32 command;
49 uint32 fullscreen;
H A Dsvga3d_devcaps.h55 typedef uint32 SVGA3dDevCapIndex;
57 #define SVGA3D_DEVCAP_INVALID ((uint32)-1)
370 uint32 u;
H A Dsvga3d_limits.h62 (SVGA3D_MAX_SHADER_MEMORY_BYTES / sizeof(uint32))
H A Dsvga3d_surfacedefs.h316 uint32 bytesPerBlock;
317 uint32 pitchBytesPerBlock;
/linux/drivers/video/fbdev/
H A Dau1200fb.h36 #define uint32 unsigned int macro
39 volatile uint32 reserved0;
40 volatile uint32 screen;
41 volatile uint32 backcolor;
42 volatile uint32 horztiming;
43 volatile uint32 verttiming;
44 volatile uint32 clkcontrol;
45 volatile uint32 pwmdiv;
46 volatile uint32 pwmhi;
47 volatile uint32 reserved1;
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H A Dau1200fb.c190 uint32 mode_backcolor;
191 uint32 mode_colorkey;
192 uint32 mode_colorkeymsk;
198 uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
199 uint32 mode_winenable;
328 uint32 mode_screen;
329 uint32 mode_horztiming;
330 uint32 mode_verttiming;
331 uint32 mode_clkcontrol;
332 uint32 mode_pwmdiv;
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/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_binding.h91 uint32 texture_stage;
117 uint32 offset;
118 uint32 size;
119 uint32 slot;
132 uint32 slot;
145 uint32 offset;
146 uint32 size;
147 uint32 slot;
160 uint32 offset;
161 uint32 stride;
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H A Dvmwgfx_so.c104 uint32 view_id;
105 uint32 sid;
H A Dvmwgfx_drv.h616 uint32 *devcaps;
1452 static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg) in vmw_fifo_mem_read()
1501 uint32 status) in vmw_irq_status_write()
/linux/drivers/firmware/arm_scmi/vendors/imx/
H A Dimx95.rst77 |uint32 version | For this revision of the specification, this value must be |
94 |uint32 attributes | Bits[31:8] Number of RTCs. |
114 |uint32 attributes |Flags that are associated with a specific function in the |
130 |uint32 index |Index of GPR to write |
132 |uint32 value |32-bit value to write to the GPR |
155 |uint32 index |Index of GPR to read |
166 |uint32 value |32-bit value read from the GPR |
180 |uint32 index |Index of RTC |
189 |uint32 attributes |Bit[31:24] Bit width of RTC seconds. |
208 |uint32 index |Index of RTC |
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/linux/Documentation/virt/kvm/arm/
H A Dptp_kvm.rst21 | Function ID: | (uint32) | 0x86000001 |
23 | Arguments: | (uint32) | R1 | ``KVM_PTP_VIRT_COUNTER (0)`` |
30 | | (uint32) | R1 | Lower 32 bits of wall clock time |
32 | | (uint32) | R2 | Upper 32 bits of counter |
34 | | (uint32) | R3 | Lower 32 bits of counter |
H A Dhypercalls.rst30 | Function ID: | (uint32) | 0x86000000 |
34 | Return Values: | (uint32) | R0 | Bitmap of available function numbers 0-31 |
36 | | (uint32) | R1 | Bitmap of available function numbers 32-63 |
38 | | (uint32) | R2 | Bitmap of available function numbers 64-95 |
40 | | (uint32) | R3 | Bitmap of available function numbers 96-127 |
58 | Function ID: | (uint32) | 0xC6000002 |
82 | Function ID: | (uint32) | 0xC6000003 |
107 | Function ID: | (uint32) | 0xC6000004 |
133 | Function ID: | (uint32) | 0xC6000007 |
H A Dpvtime.rst28 Function ID: (uint32) 0xC5000020
29 PV_call_id: (uint32) The function to query for support.
38 Function ID: (uint32) 0xC5000021
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Dcmntypes.h43 typedef unsigned int uint32, *puint32; typedef
70 uint32 val;
80 uint32 i;
H A Ddml_display_rq_dlg_calc.c48 uint32 pixel_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
49 uint32 min_pixel_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
50 uint32 meta_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
51 uint32 min_meta_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
52 uint32 dpte_group_bytes = 0; in dml_rq_dlg_get_rq_reg()
53 uint32 mpte_group_bytes = 0; in dml_rq_dlg_get_rq_reg()
55 uint32 p1_pixel_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
56 uint32 p1_min_pixel_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
57 uint32 p1_meta_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
58 uint32 p1_min_meta_chunk_bytes = 0; in dml_rq_dlg_get_rq_reg()
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx.h244 CVMX_BUILD_WRITE64(uint32, "sw");
260 CVMX_BUILD_READ64(uint32, "lw");
/linux/arch/arm/nwfpe/
H A DARM-gcc.h25 typedef unsigned int uint32; typedef
/linux/Documentation/hwmon/
H A Ddell-smm-hwmon.rst236 void Execute([in, out] uint32 EaxLen, [in, out, WmiSizeIs("EaxLen") : ToInstance] uint8 EaxVal[],
237 [in, out] uint32 EbxLen, [in, out, WmiSizeIs("EbxLen") : ToInstance] uint8 EbxVal[],
238 [in, out] uint32 EcxLen, [in, out, WmiSizeIs("EcxLen") : ToInstance] uint8 EcxVal[],
239 [in, out] uint32 EdxLen, [in, out, WmiSizeIs("EdxLen") : ToInstance] uint8 EdxVal[]);
/linux/Documentation/devicetree/bindings/dma/
H A Dti-edma.txt46 Single uint32 for EDMA with 32 channels, array of two uint32 for

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