Searched refs:udw (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | execlist.h | 56 u32 udw; member 79 u32 udw; member 118 u32 udw; member
|
| H A D | execlist.c | 99 status.udw = vgpu_vreg(vgpu, status_reg + 4); in emulate_execlist_status() 118 vgpu_vreg(vgpu, status_reg + 4) = status.udw; in emulate_execlist_status() 121 vgpu->id, status_reg, status.ldw, status.udw); in emulate_execlist_status() 153 vgpu_vreg(vgpu, offset + 4) = status->udw; in emulate_csb_update() 171 vgpu->id, write_pointer, offset, status->ldw, status->udw); in emulate_csb_update() 263 status.udw = vgpu_vreg(vgpu, status_reg + 4); in get_next_execlist_slot() 496 desc[0]->udw, desc[0]->ldw, desc[1]->udw, desc[1]->ldw); in intel_vgpu_submit_execlist()
|
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_color.c | 887 u32 ldw, u32 udw) in i9xx_lut_10_pack() argument 890 REG_FIELD_GET(PALETTE_10BIT_RED_UDW_MASK, udw) << 8; in i9xx_lut_10_pack() 892 REG_FIELD_GET(PALETTE_10BIT_GREEN_UDW_MASK, udw) << 8; in i9xx_lut_10_pack() 894 REG_FIELD_GET(PALETTE_10BIT_BLUE_UDW_MASK, udw) << 8; in i9xx_lut_10_pack() 902 u32 ldw, u32 udw) in i9xx_lut_10_pack_slope() argument 904 int r_exp = REG_FIELD_GET(PALETTE_10BIT_RED_EXP_MASK, udw); in i9xx_lut_10_pack_slope() 905 int r_mant = REG_FIELD_GET(PALETTE_10BIT_RED_MANT_MASK, udw); in i9xx_lut_10_pack_slope() 906 int g_exp = REG_FIELD_GET(PALETTE_10BIT_GREEN_EXP_MASK, udw); in i9xx_lut_10_pack_slope() 907 int g_mant = REG_FIELD_GET(PALETTE_10BIT_GREEN_MANT_MASK, udw); in i9xx_lut_10_pack_slope() 908 int b_exp = REG_FIELD_GET(PALETTE_10BIT_BLUE_EXP_MASK, udw); in i9xx_lut_10_pack_slope() [all …]
|
| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_lrc.c | 846 u32 ldw, udw = 0; in xe_lrc_ctx_timestamp() local 853 udw = xe_map_read32(xe, &map); in xe_lrc_ctx_timestamp() 856 return (u64)udw << 32 | ldw; in xe_lrc_ctx_timestamp()
|