Searched refs:ucMiscInfo (Results 1 – 4 of 4) sorted by relevance
634 args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2; in amdgpu_atombios_crtc_program_pll()636 args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1; in amdgpu_atombios_crtc_program_pll()638 args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC; in amdgpu_atombios_crtc_program_pll()649 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ in amdgpu_atombios_crtc_program_pll()652 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC; in amdgpu_atombios_crtc_program_pll()657 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP; in amdgpu_atombios_crtc_program_pll()661 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP; in amdgpu_atombios_crtc_program_pll()665 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP; in amdgpu_atombios_crtc_program_pll()679 args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */ in amdgpu_atombios_crtc_program_pll()683 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_REF_DIV_SRC; in amdgpu_atombios_crtc_program_pll()[all …]
1018 params->ucMiscInfo |= PIXEL_CLOCK_MISC_FORCE_PROG_PPLL; in set_pixel_clock_v3()1021 params->ucMiscInfo |= PIXEL_CLOCK_MISC_USE_ENGINE_FOR_DISPCLK; in set_pixel_clock_v3()1024 params->ucMiscInfo |= PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2; in set_pixel_clock_v3()1087 clk.sPCLKInput.ucMiscInfo |= in set_pixel_clock_v5()1091 clk.sPCLKInput.ucMiscInfo |= in set_pixel_clock_v5()1103 clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP; in set_pixel_clock_v5()1107 clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP; in set_pixel_clock_v5()1176 clk.sPCLKInput.ucMiscInfo |= in set_pixel_clock_v6()1181 clk.sPCLKInput.ucMiscInfo |= in set_pixel_clock_v6()1193 clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP_V6; in set_pixel_clock_v6()[all …]
1848 …UCHAR ucMiscInfo; // Different bits for different purpose, bit [7:4] as device i… member1899 …UCHAR ucMiscInfo; // bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC … member1925 UCHAR ucMiscInfo; // bit[0]= Force program PPLL member1973 UCHAR ucMiscInfo; // bit[0]= Force program PPLL member2023 UCHAR ucMiscInfo; // bit[0]= Force program PLL for pixclk member4452 UCHAR ucMiscInfo; member4469 UCHAR ucMiscInfo; member
1573 …UCHAR ucMiscInfo; // Different bits for different purpose, bit [7:4] as device i… member1624 …UCHAR ucMiscInfo; // bit[0]=Force program, bit[1]= set pclk for VGA, b[2]= CRTC … member1649 UCHAR ucMiscInfo; // bit[0]= Force program PPLL member1697 UCHAR ucMiscInfo; // bit[0]= Force program PPLL member3959 UCHAR ucMiscInfo; member3976 UCHAR ucMiscInfo; member