Searched refs:ubwc_config (Results 1 – 4 of 4) sorted by relevance
590 gpu->ubwc_config.rgb565_predicator = 0; in a6xx_calc_ubwc_config()591 gpu->ubwc_config.uavflagprd_inv = 0; in a6xx_calc_ubwc_config()592 gpu->ubwc_config.min_acc_len = 0; in a6xx_calc_ubwc_config()593 gpu->ubwc_config.ubwc_swizzle = 0x6; in a6xx_calc_ubwc_config()594 gpu->ubwc_config.macrotile_mode = 0; in a6xx_calc_ubwc_config()595 gpu->ubwc_config.highest_bank_bit = 15; in a6xx_calc_ubwc_config()598 gpu->ubwc_config.highest_bank_bit = 13; in a6xx_calc_ubwc_config()599 gpu->ubwc_config.min_acc_len = 1; in a6xx_calc_ubwc_config()600 gpu->ubwc_config.ubwc_swizzle = 0x7; in a6xx_calc_ubwc_config()604 gpu->ubwc_config.highest_bank_bit = 14; in a6xx_calc_ubwc_config()[all …]
836 BUG_ON(adreno_gpu->ubwc_config.highest_bank_bit < 13); in a5xx_hw_init()837 hbb = adreno_gpu->ubwc_config.highest_bank_bit - 13; in a5xx_hw_init()1795 adreno_gpu->ubwc_config.highest_bank_bit = 15; in a5xx_gpu_init()1797 adreno_gpu->ubwc_config.highest_bank_bit = 14; in a5xx_gpu_init()1800 adreno_gpu->ubwc_config.macrotile_mode = 0; in a5xx_gpu_init()1801 adreno_gpu->ubwc_config.ubwc_swizzle = 0x7; in a5xx_gpu_init()
378 *value = adreno_gpu->ubwc_config.highest_bank_bit; in adreno_get_param()384 *value = adreno_gpu->ubwc_config.ubwc_swizzle; in adreno_get_param()387 *value = adreno_gpu->ubwc_config.macrotile_mode; in adreno_get_param()
245 } ubwc_config; member