Home
last modified time | relevance | path

Searched refs:uartclk (Results 1 – 25 of 135) sorted by relevance

123456

/linux/drivers/tty/serial/8250/
H A D8250_ni.c71 u32 uartclk; member
332 uart->port.uartclk = info->uartclk; in ni16550_probe()
338 if (!uart->port.uartclk) { in ni16550_probe()
341 uart->port.uartclk = clk_get_rate(data->clk); in ni16550_probe()
344 if (!uart->port.uartclk) in ni16550_probe()
405 .uartclk = 33333333,
410 .uartclk = 1843200,
417 .uartclk = 22222222,
424 .uartclk = 29629629,
H A D8250_acorn.c27 unsigned int uartclk; member
65 uart.port.uartclk = type->uartclk; in serial_card_probe()
96 .uartclk = 7372800,
103 .uartclk = 3686400,
H A D8250_rsa.c141 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; in __rsa_enable()
154 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { in rsa_enable()
158 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) in rsa_enable()
175 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) in rsa_disable()
190 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; in rsa_disable()
H A D8250_hp300.c116 port.uartclk = HPAPCI_BAUD_BASE * 16; in hp300_setup_serial_console()
133 port.uartclk = HPDCA_BAUD_BASE * 16; in hp300_setup_serial_console()
175 uart.port.uartclk = HPDCA_BAUD_BASE * 16; in hpdca_init_one()
257 uart.port.uartclk = HPAPCI_BAUD_BASE * 16; in hp300_8250_init()
H A D8250_ingenic.c86 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
107 divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud); in ingenic_earlycon_setup_tail()
147 if (dev->port.uartclk >= 16000000) in jz4750_early_console_setup()
148 dev->port.uartclk /= 2; in jz4750_early_console_setup()
298 uart.port.uartclk = clk_get_rate(data->clk_baud); in ingenic_uart_probe()
H A D8250_of.c54 return DIV_ROUND_CLOSEST(port->uartclk, 16 * baud + 2) - 2; in npcm_get_divisor()
126 if (!port->uartclk) { in of_platform_serial_setup()
143 port->uartclk = clk_get_rate(info->clk); in of_platform_serial_setup()
147 port->custom_divisor = port->uartclk / (16 * spd); in of_platform_serial_setup()
H A D8250_platform.c85 port->uartclk = old_serial_port[i].baud_base * 16; in __serial8250_isa_init_ports()
136 uart->port.uartclk = 1843200; in serial8250_probe_acpi()
168 uart->port.uartclk = p->uartclk; in serial8250_probe_platform()
H A D8250_loongson.c91 quot = DIV_ROUND_CLOSEST((port->uartclk << 4), baud); in loongson_frac_get_divisor()
148 if (!port->uartclk) { in loongson_uart_probe()
153 port->uartclk = clk_get_rate(priv->clk); in loongson_uart_probe()
H A D8250_mtk.c360 port->uartclk / 16 / UART_DIV_MAX, in mtk8250_set_termios()
361 port->uartclk); in mtk8250_set_termios()
368 quot = DIV_ROUND_UP(port->uartclk, 256 * baud); in mtk8250_set_termios()
392 tmp = (port->uartclk / (baud * quot)) - 1; in mtk8250_set_termios()
398 fraction = ((port->uartclk * 100) / baud / quot) % 100; in mtk8250_set_termios()
566 uart.port.uartclk = clk_get_rate(data->uart_clk); in mtk8250_probe()
/linux/arch/arm/mach-omap1/
H A Dserial.c73 .uartclk = OMAP16XX_BASE_BAUD * 16,
81 .uartclk = OMAP16XX_BASE_BAUD * 16,
89 .uartclk = OMAP16XX_BASE_BAUD * 16,
112 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
113 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
114 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3519.dtsi56 clock-names = "uartclk", "apb_pclk";
65 clock-names = "uartclk", "apb_pclk";
74 clock-names = "uartclk", "apb_pclk";
83 clock-names = "uartclk", "apb_pclk";
92 clock-names = "uartclk", "apb_pclk";
/linux/arch/mips/ath25/
H A Ddevices.c74 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) in ath25_serial_setup() argument
86 s.uartclk = uartclk; in ath25_serial_setup()
/linux/arch/mips/mti-malta/
H A Dmalta-platform.c34 .uartclk = 1843200, \
49 .uartclk = 3686400, /* Twice the usual clk! */
/linux/arch/arm/boot/dts/arm/
H A Dintegratorcp.dts73 uartclk: clock-14745600 { label
249 clocks = <&uartclk>, <&pclk>;
250 clock-names = "uartclk", "apb_pclk";
255 clocks = <&uartclk>, <&pclk>;
256 clock-names = "uartclk", "apb_pclk";
279 clocks = <&uartclk>, <&pclk>;
H A Dintegratorap.dts67 uartclk: clock-14745600 { label
216 clocks = <&uartclk>, <&pclk>;
217 clock-names = "uartclk", "apb_pclk";
223 clocks = <&uartclk>, <&pclk>;
224 clock-names = "uartclk", "apb_pclk";
/linux/arch/arm/mach-footbridge/
H A Disa.c52 .uartclk = 1843200,
60 .uartclk = 1843200,
/linux/drivers/tty/serial/
H A D21285.c244 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); in serial21285_set_termios()
246 b = port->uartclk / (16 * quot); in serial21285_set_termios()
347 if (ser->baud_base != port->uartclk / 16) in serial21285_verify_port()
381 serial21285_port.uartclk = mem_fclk_21285 / 4; in serial21285_setup_ports()
431 *baud = port->uartclk / (16 * (tmp + 1)); in serial21285_get_options()
H A Dsccnxp.c311 div_std = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * baud); in sccnxp_set_baud()
313 bestbaud = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * div_std); in sccnxp_set_baud()
327 tmp_baud = DIV_ROUND_CLOSEST(port->uartclk, div_std); in sccnxp_set_baud()
888 int i, ret, uartclk; in sccnxp_probe() local
924 uartclk = 0; in sccnxp_probe()
926 uartclk = clk_get_rate(clk); in sccnxp_probe()
929 if (!uartclk) { in sccnxp_probe()
931 uartclk = s->chip->freq_std; in sccnxp_probe()
935 if ((uartclk < s->chip->freq_min) || (uartclk > s->chip->freq_max)) { in sccnxp_probe()
990 s->port[i].uartclk = uartclk; in sccnxp_probe()
H A Dlpc32xx_hs.c207 static unsigned int __serial_get_clock_div(unsigned long uartclk, in __serial_get_clock_div() argument
214 div = uartclk / rate; in __serial_get_clock_div()
224 comprate = uartclk / ((hsu_rate + 1) * 14); in __serial_get_clock_div()
485 port->uartclk / 14); in serial_lpc32xx_set_termios()
487 quot = __serial_get_clock_div(port->uartclk, baud); in serial_lpc32xx_set_termios()
636 p->port.uartclk = LPC32XX_MAIN_OSC_FREQ; in serial_hs_lpc32xx_probe()
/linux/arch/mips/loongson2ef/common/
H A Dserial.c25 .uartclk = clk, \
34 .uartclk = clk, \
/linux/arch/arm64/boot/dts/arm/
H A Dfoundation-v8.dtsi204 clock-names = "uartclk", "apb_pclk";
212 clock-names = "uartclk", "apb_pclk";
220 clock-names = "uartclk", "apb_pclk";
228 clock-names = "uartclk", "apb_pclk";
H A Drtsm_ve-motherboard.dtsi174 clock-names = "uartclk", "apb_pclk";
182 clock-names = "uartclk", "apb_pclk";
190 clock-names = "uartclk", "apb_pclk";
198 clock-names = "uartclk", "apb_pclk";
/linux/arch/mips/bcm47xx/
H A Dserial.c44 p->uartclk = ssb_port->baud_base; in uart8250_init_ssb()
70 p->uartclk = bcma_port->baud_base; in uart8250_init_bcma()
/linux/arch/sh/boards/mach-se/7343/
H A Dsetup.c78 .uartclk = 7372800,
85 .uartclk = 7372800,
/linux/arch/mips/alchemy/common/
H A Dplatform.c103 long uartclk; in alchemy_setup_uarts() local
115 uartclk = clk_get_rate(clk); in alchemy_setup_uarts()
128 ports[s].uartclk = uartclk; in alchemy_setup_uarts()

123456