Home
last modified time | relevance | path

Searched refs:uart1_parents (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8516.c107 static const char * const uart1_parents[] __initconst = { variable
371 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
H A Dclk-mt8167.c154 static const char * const uart1_parents[] = { variable
540 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
/linux/drivers/clk/spear/
H A Dspear1340_clock.c420 static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk", variable
653 clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents, in spear1340_clk_init()
654 ARRAY_SIZE(uart1_parents), CLK_SET_RATE_NO_REPARENT, in spear1340_clk_init()