Searched refs:tx_lx_tx_emp_post1_lvl (Results 1 – 2 of 2) sorted by relevance
64 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL]; member360 cfg->tx_lx_tx_emp_post1_lvl[0] = 0x03; in pll_calculate()361 cfg->tx_lx_tx_emp_post1_lvl[1] = 0x02; in pll_calculate()362 cfg->tx_lx_tx_emp_post1_lvl[2] = 0x03; in pll_calculate()363 cfg->tx_lx_tx_emp_post1_lvl[3] = 0x00; in pll_calculate()381 cfg->tx_lx_tx_emp_post1_lvl[0] = 0x03; in pll_calculate()382 cfg->tx_lx_tx_emp_post1_lvl[1] = 0x03; in pll_calculate()383 cfg->tx_lx_tx_emp_post1_lvl[2] = 0x03; in pll_calculate()384 cfg->tx_lx_tx_emp_post1_lvl[3] = 0x00; in pll_calculate()402 cfg->tx_lx_tx_emp_post1_lvl[0] = 0x05; in pll_calculate()[all …]
64 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL]; member326 cfg->tx_lx_tx_emp_post1_lvl[0] = in pll_calculate()327 cfg->tx_lx_tx_emp_post1_lvl[1] = in pll_calculate()328 cfg->tx_lx_tx_emp_post1_lvl[2] = 0x23; in pll_calculate()329 cfg->tx_lx_tx_emp_post1_lvl[3] = 0x27; in pll_calculate()344 cfg->tx_lx_tx_emp_post1_lvl[i] = 0x23; in pll_calculate()355 cfg->tx_lx_tx_emp_post1_lvl[i] = 0x20; in pll_calculate()387 cfg->tx_lx_tx_emp_post1_lvl[i]); in pll_calculate()507 cfg.tx_lx_tx_emp_post1_lvl[i]); in hdmi_8996_pll_set_clk_rate()