Searched refs:trig_type (Results 1 – 5 of 5) sorted by relevance
94 eqbr_cfg_bit(gctrl->membase + GPIO_IRNCFG, offset, type->trig_type); in eqbr_irq_type_cfg()95 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR1, offset, type->trig_type); in eqbr_irq_type_cfg()116 it.trig_type = GPIO_EDGE_TRIG; in eqbr_irq_set_type()122 it.trig_type = GPIO_EDGE_TRIG; in eqbr_irq_set_type()128 it.trig_type = GPIO_EDGE_TRIG; in eqbr_irq_set_type()134 it.trig_type = GPIO_LEVEL_TRIG; in eqbr_irq_set_type()140 it.trig_type = GPIO_LEVEL_TRIG; in eqbr_irq_set_type()150 if (it.trig_type == GPIO_EDGE_TRIG) in eqbr_irq_set_type()
996 unsigned int trig_type; in cy8c95x0_irq_set_type() local1002 trig_type = type; in cy8c95x0_irq_set_type()1005 trig_type = IRQ_TYPE_EDGE_RISING; in cy8c95x0_irq_set_type()1008 trig_type = IRQ_TYPE_EDGE_FALLING; in cy8c95x0_irq_set_type()1015 assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING); in cy8c95x0_irq_set_type()1016 assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING); in cy8c95x0_irq_set_type()
160 unsigned int con, trig_type; in exynos_irq_set_type() local166 trig_type = EXYNOS_EINT_EDGE_RISING; in exynos_irq_set_type()169 trig_type = EXYNOS_EINT_EDGE_FALLING; in exynos_irq_set_type()172 trig_type = EXYNOS_EINT_EDGE_BOTH; in exynos_irq_set_type()175 trig_type = EXYNOS_EINT_LEVEL_HIGH; in exynos_irq_set_type()178 trig_type = EXYNOS_EINT_LEVEL_LOW; in exynos_irq_set_type()204 con |= trig_type << shift; in exynos_irq_set_type()
271 drvdata->dsb->trig_type = false; in tpdm_reset_datasets()369 if (drvdata->dsb->trig_type) in tpdm_enable_dsb()932 (unsigned int)drvdata->dsb->trig_type); in dsb_trig_type_show()953 drvdata->dsb->trig_type = true; in dsb_trig_type_store()955 drvdata->dsb->trig_type = false; in dsb_trig_type_store()
257 bool trig_type; member