Searched refs:timings0 (Results 1 – 1 of 1) sorted by relevance
429 u32 timings0; member1374 writel_relaxed(t->timings0, cdns_ctrl->reg + TIMINGS0); in cadence_nand_set_timings()2574 t->timings0 = reg; in cadence_nand_setup_sdr_interface()2723 t->timings0 = reg; in cadence_nand_setup_nvddr_interface()2848 writel_relaxed(t->timings0, cdns_ctrl->reg + TIMINGS0); in cadence_nand_setup_nvddr_interface()