| H A D | amdgpu_dm_plane.c | 198 struct dc_tiling_info *tiling_info,
202 tiling_info->gfx8.array_mode = DC_ARRAY_LINEAR_GENERAL; in amdgpu_dm_plane_modifier_has_dcc()
203 tiling_info->gfxversion = DcGfxVersion8; in amdgpu_dm_plane_modifier_has_dcc()
214 tiling_info->gfx8.array_mode = AMD_FMT_MOD_GET(TILE, modifier);
215 tiling_info->gfxversion = DcGfxVersion8; in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
216 tiling_info->gfx8.tile_mode = AMD_FMT_MOD_GET(MICROTILE, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier() argument
221 tiling_info->gfx8.pipe_config = AMD_FMT_MOD_GET(PIPE_CONFIG, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
222 tiling_info->gfx8.tile_split = AMD_FMT_MOD_GET(TILE_SPLIT, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
223 tiling_info->gfx8.bank_width = AMD_FMT_MOD_GET(BANK_WIDTH, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
224 tiling_info in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
251 amdgpu_dm_plane_fill_gfx9_tiling_info_from_device(const struct amdgpu_device * adev,struct dc_tiling_info * tiling_info) amdgpu_dm_plane_fill_gfx9_tiling_info_from_device() argument
273 amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(const struct amdgpu_device * adev,struct dc_tiling_info * tiling_info,uint64_t modifier) amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier() argument
304 amdgpu_dm_plane_validate_dcc(struct amdgpu_device * adev,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct dc_tiling_info * tiling_info,const struct dc_plane_dcc_param * dcc,const struct dc_plane_address * address,const struct plane_size * plane_size) amdgpu_dm_plane_validate_dcc() argument
356 amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct plane_size * plane_size,struct dc_tiling_info * tiling_info,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address) amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers() argument
408 amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct plane_size * plane_size,struct dc_tiling_info * tiling_info,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address) amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers() argument
1134 amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,struct dc_tiling_info * tiling_info,struct plane_size * plane_size,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address,bool tmz_surface) amdgpu_dm_plane_fill_plane_buffer_attributes() argument
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