| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | metafmt-pisp-be.rst | 18 The PiSP Back End processes images in tiles, and its configuration requires
31 to be processed and is therefore shared across all the tiles of the image. So
33 across all tiles from the same frame.
41 As the ISP processes images in tiles, each set of tiles parameters describe how
43 parameters consist of 160 bytes of data and to process a batch of tiles several
44 sets of tiles parameters are required.
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| H A D | pixfmt-yuv-planar.rst | 103 - 64x32 tiles
112 - 16x16 tiles
126 - 4x4 tiles
154 - 4x4 tiles
161 - 16x32 / 16x16 tiles tiled low bits
168 - 16x32 / 16x16 tiles raster low bits
390 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
395 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
399 If the vertical resolution is an odd number of tiles, the last row of
400 tiles is stored in linear order. The layouts of the luma and chroma
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | nv25.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
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| H A D | nv35.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
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| H A D | nv36.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
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| H A D | nv40.c | 33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
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| H A D | nv20.c | 46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
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| H A D | nv30.c | 52 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv30_fb_tile_comp() local
53 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv30_fb_tile_comp()
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| /linux/Documentation/admin-guide/perf/ |
| H A D | thunderx2-pmu.rst | 9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
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| /linux/arch/arm/include/debug/ |
| H A D | vexpress.S | 28 @ - all other (RS1 complaint) tiles use UART mapped
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| /linux/drivers/pinctrl/qcom/ |
| H A D | pinctrl-msm.h | 179 const char *const *tiles; member
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| H A D | pinctrl-msm.c | 1613 if (soc_data->tiles) { in msm_pinctrl_probe()
1616 soc_data->tiles[i]); in msm_pinctrl_probe()
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-hid-picolcd | 41 tiles get changed and it's not appropriate to expect the application
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_gsc_proxy.c | 381 struct xe_gt *gt = xe->tiles[0].media_gt; in xe_gsc_proxy_component_bind()
396 struct xe_gt *gt = xe->tiles[0].media_gt; in xe_gsc_proxy_component_unbind()
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| H A D | xe_vram.c | 223 vram->migrate = xe->tiles[id].migrate; in xe_vram_region_alloc()
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| H A D | xe_device.c | 1063 if (xe->tiles->media_gt && in xe_device_probe()
1064 XE_GT_WA(xe->tiles->media_gt, 15015404425_disable)) in xe_device_probe()
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| H A D | xe_bo.c | 172 tile = &xe->tiles[mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0)]; in mem_type_to_migrate()
225 return xe->tiles[tile_id].mem.kernel_vram->placement; in bo_vram_flags_to_vram_placement()
227 return xe->tiles[tile_id].mem.vram->placement; in bo_vram_flags_to_vram_placement()
1203 migrate = xe->tiles[0].migrate; in xe_bo_move()
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| /linux/arch/riscv/ |
| H A D | Kconfig.socs | 77 The Blackhole SoC contains four RISC-V CPU tiles each
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| /linux/drivers/media/platform/raspberrypi/pisp_be/ |
| H A D | pisp_be.c | 198 dma_addr_t tiles; member
294 pispbe_wr(pispbe, PISP_BE_TILE_ADDR_LO_REG, lower_32_bits(job->tiles)); in pispbe_queue_job()
295 pispbe_wr(pispbe, PISP_BE_TILE_ADDR_HI_REG, upper_32_bits(job->tiles)); in pispbe_queue_job()
491 job->tiles = pispbe->config_dma_addr + in pispbe_prepare_job()
493 offsetof(struct pisp_be_tiles_config, tiles); in pispbe_prepare_job()
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | arm-realview-eb.dts | 42 * core tiles.
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| /linux/Documentation/admin-guide/media/ |
| H A D | raspberrypi-pisp-be.rst | 18 The PiSP Back End ISP processes images in tiles. The handling of image
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| /linux/Documentation/gpu/ |
| H A D | drm-vm-bind-async.rst | 209 * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
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| /linux/Documentation/translations/sp_SP/process/ |
| H A D | kernel-docs.rst | 32 útiles para buscar temas específicos, y una breve "Descripción" del
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| H A D | 1.Intro.rst | 208 útiles para otros desarrolladores del kernel. Si ha desarrollado código
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| /linux/Documentation/translations/sp_SP/ |
| H A D | memory-barriers.txt | 909 no puede reordenar accesos volátiles y tampoco puede reordenar escrituras
1886 hay markings volátiles, el compilador estaría en su derecho de
1901 conversiones volátiles, lo que no tiene efecto cuando su argumento ya está
2645 que son inherentemente no portátiles pueden depender de comportamientos
2648 portátiles entre múltiples arquitecturas e implementaciones de bus, el
2734 garantías de orden portátiles proporcionadas por inX() y outX() son las
2990 Itanium los casts volátiles utilizados por READ_ONCE() y WRITE_ONCE() hacen
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