Searched refs:tile_cols (Results 1 – 4 of 4) sorted by relevance
403 u8 tile_cols; member1296 tile->tile_cols = ctrl_tile->tile_cols; in vdec_av1_slice_setup_tile()1303 for (i = 0; i < tile->tile_cols + 1 && i < V4L2_AV1_MAX_TILE_COLS + 1; i++) in vdec_av1_slice_setup_tile()1406 tile_group->num_tiles = tile->tile_cols * tile->tile_rows; in vdec_av1_slice_setup_tile_group()1416 if (i != ctrl_tge[i].tile_row * vsi->frame.uh.tile.tile_cols + in vdec_av1_slice_setup_tile_group()1678 tile_row = tile_num / tile->tile_cols; in vdec_av1_slice_setup_tile_buffer()1679 tile_col = tile_num % tile->tile_cols; in vdec_av1_slice_setup_tile_buffer()
268 unsigned int num_tile_cols = tile_info->tile_cols; in rockchip_vpu981_av1_dec_tiles_reallocate()463 num_tiles = (u32)tile_info->tile_cols * tile_info->tile_rows; in rockchip_vpu981_av1_dec_prepare_run()615 if (tile_info->tile_cols) { in rockchip_vpu981_av1_dec_set_tile_info()617 tile_info->context_update_tile_id / tile_info->tile_cols; in rockchip_vpu981_av1_dec_set_tile_info()619 tile_info->context_update_tile_id % tile_info->tile_cols; in rockchip_vpu981_av1_dec_set_tile_info()626 for (tile0 = 0; tile0 < tile_info->tile_cols; tile0++) { in rockchip_vpu981_av1_dec_set_tile_info()628 int tile_id = tile1 * tile_info->tile_cols + tile0; in rockchip_vpu981_av1_dec_set_tile_info()668 !!((tile_info->tile_cols > 1) || (tile_info->tile_rows > 1))); in rockchip_vpu981_av1_dec_set_tile_info()669 hantro_reg_write(vpu, &av1_num_tile_cols_8k, tile_info->tile_cols); in rockchip_vpu981_av1_dec_set_tile_info()673 if (rockchip_vpu981_av1_tile_log2(tile_info->tile_cols) || in rockchip_vpu981_av1_dec_set_tile_info()
92 __entry->f.tile_info.tile_cols,
803 if (t->tile_cols > V4L2_AV1_MAX_TILE_COLS || in validate_av1_tile_info()807 if ((u32)t->tile_cols * t->tile_rows > V4L2_AV1_MAX_TILE_COUNT) in validate_av1_tile_info()