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Searched refs:tilcdc_read (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/tilcdc/
H A Dtilcdc_regs.h134 static inline u32 tilcdc_read(struct drm_device *dev, u32 reg) in tilcdc_read() function
143 tilcdc_write(dev, reg, (tilcdc_read(dev, reg) & ~mask) | (val & mask)); in tilcdc_write_mask()
148 tilcdc_write(dev, reg, tilcdc_read(dev, reg) | mask); in tilcdc_set()
153 tilcdc_write(dev, reg, tilcdc_read(dev, reg) & ~mask); in tilcdc_clear()
165 return tilcdc_read(dev, tilcdc_irqstatus_reg(dev)); in tilcdc_read_irqstatus()
H A Dtilcdc_drv.c243 switch (tilcdc_read(ddev, LCDC_PID_REG)) { in tilcdc_init()
254 tilcdc_read(ddev, LCDC_PID_REG)); in tilcdc_init()
435 tilcdc_read(dev, registers[i].reg)); in tilcdc_regs_show()
H A Dtilcdc_crtc.c290 reg = tilcdc_read(dev, LCDC_DMA_CTRL_REG) & ~0x00000770; in tilcdc_crtc_set_mode()
326 reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; in tilcdc_crtc_set_mode()
373 reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG) & in tilcdc_crtc_set_mode()
741 if (tilcdc_read(dev, LCDC_RASTER_CTRL_REG) & LCDC_RASTER_ENABLE) { in tilcdc_crtc_reset()
975 reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG); in tilcdc_crtc_irq()