Searched refs:tg_inst (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| H A D | dce_hwseq.c | 177 unsigned int tg_inst) in dce_crtc_switch_to_clk_src() argument 180 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src() 186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src() 190 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src() 196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src() 200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src() 201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src() 205 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 1505 int tg_inst, bool enable) in setup_stereo_sync() argument 1508 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in setup_stereo_sync() 1514 int tg_inst) in dig_connect_to_otg() argument 1519 REG_UPDATE(DAC_SOURCE_SELECT, DAC_SOURCE_SELECT, tg_inst); in dig_connect_to_otg() 1521 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in dig_connect_to_otg() 1527 uint32_t tg_inst = 0; in dig_source_otg() local 1531 REG_GET(DAC_SOURCE_SELECT, DAC_SOURCE_SELECT, &tg_inst); in dig_source_otg() 1533 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in dig_source_otg() 1535 return tg_inst; in dig_source_otg()
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 1533 unsigned int enc_inst, tg_inst = 0; in disable_vbios_mode_if_required() local 1540 tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg( in disable_vbios_mode_if_required() 1548 tg_inst, &pix_clk_100hz); in disable_vbios_mode_if_required() 1861 unsigned int tg_inst = 0; in dc_validate_boot_timing() local 1891 tg_inst = dc->res_pool->stream_enc[i]->funcs->dig_source_otg( in dc_validate_boot_timing() 1903 if (tg_inst >= dc->res_pool->timing_generator_count) { in dc_validate_boot_timing() 1908 if (tg_inst != link->link_enc->preferred_engine) { in dc_validate_boot_timing() 1913 tg = dc->res_pool->timing_generators[tg_inst]; in dc_validate_boot_timing() 1997 if (tg_inst < (unsigned int)dc->res_pool->res_cap->num_dsc) { in dc_validate_boot_timing() 1998 dsc = dc->res_pool->dscs[tg_inst]; in dc_validate_boot_timing() [all …]
|