Home
last modified time | relevance | path

Searched refs:tcr (Results 1 – 25 of 49) sorted by relevance

12

/linux/Documentation/misc-devices/
H A Doxsemi-tornado.rst45 (tcr), the clock prescaler (cpr) and the divisor (div) produced by the
50 r: 15625000, a: 15625000.00, d: 0.0000%, tcr: 4, cpr: 1.000, div: 1
51 r: 12500000, a: 12500000.00, d: 0.0000%, tcr: 5, cpr: 1.000, div: 1
52 r: 10416666, a: 10416666.67, d: 0.0000%, tcr: 6, cpr: 1.000, div: 1
53 r: 8928571, a: 8928571.43, d: 0.0000%, tcr: 7, cpr: 1.000, div: 1
54 r: 7812500, a: 7812500.00, d: 0.0000%, tcr: 8, cpr: 1.000, div: 1
55 r: 4000000, a: 4000000.00, d: 0.0000%, tcr: 5, cpr: 3.125, div: 1
56 r: 3686400, a: 3676470.59, d: -0.2694%, tcr: 8, cpr: 2.125, div: 1
57 r: 3500000, a: 3496503.50, d: -0.0999%, tcr: 13, cpr: 1.375, div: 1
58 r: 3000000, a: 2976190.48, d: -0.7937%, tcr: 14, cpr: 1.500, div: 1
[all …]
/linux/drivers/clocksource/
H A Dtimer-davinci.c87 unsigned int tcr; in davinci_tim12_shutdown() local
89 tcr = DAVINCI_TIMER_ENAMODE_DISABLED << in davinci_tim12_shutdown()
96 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_shutdown()
99 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR); in davinci_tim12_shutdown()
104 unsigned int tcr; in davinci_tim12_set_oneshot() local
106 tcr = DAVINCI_TIMER_ENAMODE_ONESHOT << in davinci_tim12_set_oneshot()
109 tcr |= DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_tim12_set_oneshot()
112 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR); in davinci_tim12_set_oneshot()
198 int tcr; in davinci_clocksource_init_tim34() local
200 tcr = DAVINCI_TIMER_ENAMODE_PERIODIC << in davinci_clocksource_init_tim34()
[all …]
H A Dtimer-keystone.c76 u32 tcr; in keystone_timer_config() local
79 tcr = keystone_timer_readl(TCR); in keystone_timer_config()
80 off = tcr & ~(TCR_ENAMODE_MASK); in keystone_timer_config()
83 tcr |= mask; in keystone_timer_config()
102 keystone_timer_writel(tcr, TCR); in keystone_timer_config()
108 u32 tcr; in keystone_timer_disable() local
110 tcr = keystone_timer_readl(TCR); in keystone_timer_disable()
113 tcr &= ~(TCR_ENAMODE_MASK); in keystone_timer_disable()
114 keystone_timer_writel(tcr, TCR); in keystone_timer_disable()
/linux/include/linux/fsl/bestcomm/
H A Dbestcomm_priv.h264 reg = in_be16(&bcom_eng->regs->tcr[task]); in bcom_enable_task()
265 out_be16(&bcom_eng->regs->tcr[task], reg | TASK_ENABLE); in bcom_enable_task()
271 u16 reg = in_be16(&bcom_eng->regs->tcr[task]); in bcom_disable_task()
272 out_be16(&bcom_eng->regs->tcr[task], reg & ~TASK_ENABLE); in bcom_disable_task()
337 u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; in bcom_set_task_auto_start() local
338 out_be16(tcr, (in_be16(tcr) & ~0xff) | 0x00c0 | next_task); in bcom_set_task_auto_start()
344 u16 __iomem *tcr = &bcom_eng->regs->tcr[task]; in bcom_set_tcr_initiator() local
345 out_be16(tcr, (in_be16(tcr) & ~0x1f00) | ((initiator & 0x1f) << 8)); in bcom_set_tcr_initiator()
/linux/arch/arm64/kvm/
H A Dpauth.c63 u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2); in effective_tbi() local
73 tbi = tcr & BIT(20); in effective_tbi()
74 tbid = tcr & BIT(29); in effective_tbi()
76 tbi = tcr & TCR_TBI1; in effective_tbi()
77 tbid = tcr & TCR_TBID1; in effective_tbi()
79 tbi = tcr & TCR_TBI0; in effective_tbi()
80 tbid = tcr & TCR_TBID0; in effective_tbi()
90 u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2); in compute_bottom_pac() local
94 txsz = FIELD_GET(TCR_T0SZ_MASK, tcr); in compute_bottom_pac()
96 txsz = FIELD_GET(TCR_T1SZ_MASK, tcr); in compute_bottom_pac()
H A Dat.c151 u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr; in setup_s1_walk() local
172 tcr = vcpu_read_sys_reg(vcpu, TCR_EL1); in setup_s1_walk()
180 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2); in setup_s1_walk()
190 FIELD_GET(TCR_EL2_TBI, tcr) : in setup_s1_walk()
192 FIELD_GET(TCR_TBI1, tcr) : in setup_s1_walk()
193 FIELD_GET(TCR_TBI0, tcr))); in setup_s1_walk()
239 FIELD_GET(TCR_EL2_HPD, tcr) : in setup_s1_walk()
241 FIELD_GET(TCR_HPD1, tcr) : in setup_s1_walk()
242 FIELD_GET(TCR_HPD0, tcr))); in setup_s1_walk()
254 wi->txsz = FIELD_GET(TCR_T1SZ_MASK, tcr); in setup_s1_walk()
[all …]
H A Darm.c1981 unsigned long tcr; in cpu_prepare_hyp_mode() local
1994 tcr = read_sysreg(tcr_el1); in cpu_prepare_hyp_mode()
1996 tcr &= ~(TCR_HD | TCR_HA | TCR_A1 | TCR_T0SZ_MASK); in cpu_prepare_hyp_mode()
1997 tcr |= TCR_EPD1_MASK; in cpu_prepare_hyp_mode()
1999 unsigned long ips = FIELD_GET(TCR_IPS_MASK, tcr); in cpu_prepare_hyp_mode()
2001 tcr &= TCR_EL2_MASK; in cpu_prepare_hyp_mode()
2002 tcr |= TCR_EL2_RES1 | FIELD_PREP(TCR_EL2_PS_MASK, ips); in cpu_prepare_hyp_mode()
2004 tcr |= TCR_EL2_DS; in cpu_prepare_hyp_mode()
2006 tcr |= TCR_T0SZ(hyp_va_bits); in cpu_prepare_hyp_mode()
2007 params->tcr_el2 = tcr; in cpu_prepare_hyp_mode()
/linux/drivers/tty/serial/8250/
H A D8250_dwlib.c183 u32 tcr; in dw8250_rs485_config() local
185 tcr = dw8250_readl_ext(p, DW_UART_TCR); in dw8250_rs485_config()
186 tcr &= ~DW_UART_TCR_XFER_MODE; in dw8250_rs485_config()
189 tcr |= DW_UART_TCR_RS485_EN; in dw8250_rs485_config()
192 tcr |= DW_UART_TCR_XFER_MODE_DE_DURING_RE; in dw8250_rs485_config()
194 tcr |= DW_UART_TCR_XFER_MODE_DE_OR_RE; in dw8250_rs485_config()
201 tcr &= ~DW_UART_TCR_RS485_EN; in dw8250_rs485_config()
205 tcr |= DW_UART_TCR_DE_POL; in dw8250_rs485_config()
206 tcr &= ~DW_UART_TCR_RE_POL; in dw8250_rs485_config()
209 tcr &= ~DW_UART_TCR_DE_POL; in dw8250_rs485_config()
[all …]
/linux/arch/arm/mach-rpc/
H A Ddma.c207 int tcr, speed; in iomd_set_dma_speed() local
218 tcr = iomd_readb(IOMD_DMATCR); in iomd_set_dma_speed()
223 tcr = (tcr & ~0x03) | speed; in iomd_set_dma_speed()
227 tcr = (tcr & ~0x0c) | (speed << 2); in iomd_set_dma_speed()
231 tcr = (tcr & ~0x30) | (speed << 4); in iomd_set_dma_speed()
235 tcr = (tcr & ~0xc0) | (speed << 6); in iomd_set_dma_speed()
242 iomd_writeb(tcr, IOMD_DMATCR); in iomd_set_dma_speed()
/linux/arch/mips/kernel/
H A Dcevt-txx9.c63 __raw_writel(TCR_BASE, &tmrptr->tcr); in txx9_clocksource_init()
68 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9_clocksource_init()
83 __raw_writel(TCR_BASE, &tmrptr->tcr); in txx9tmr_stop_and_clear()
100 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9tmr_set_state_periodic()
148 __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9tmr_set_next_event()
211 __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr); in txx9_tmr_init()
213 __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr); in txx9_tmr_init()
/linux/arch/powerpc/include/asm/
H A Dreg_booke.h440 #define TCR_GET_WP(tcr) ((((tcr) & 0xC0000000) >> 30) | \ argument
441 (((tcr) & 0x1E0000) >> 15))
443 #define TCR_GET_WP(tcr) (((tcr) & 0xC0000000) >> 30) argument
/linux/drivers/watchdog/
H A Dtxx9wdt.c58 &txx9wdt_reg->tcr); in txx9wdt_start()
68 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, in txx9wdt_stop()
69 &txx9wdt_reg->tcr); in txx9wdt_stop()
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dtlb.c15 u64 tcr; member
86 val = cxt->tcr = read_sysreg_el1(SYS_TCR); in enter_vmid_context()
144 write_sysreg_el1(cxt->tcr, SYS_TCR); in exit_vmid_context()
/linux/arch/powerpc/sysdev/
H A Dmpic_timer.c141 u32 tcr; in set_cascade_timer() local
150 tcr = casc_priv->tcr_value | in set_cascade_timer()
152 setbits32(priv->group_tcr, tcr); in set_cascade_timer()
335 u32 tcr; in mpic_free_timer() local
336 tcr = casc_priv->tcr_value | (casc_priv->tcr_value << in mpic_free_timer()
338 clrbits32(priv->group_tcr, tcr); in mpic_free_timer()
/linux/arch/powerpc/platforms/44x/
H A Dgpio.c28 __be32 tcr; member
106 clrbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
139 setbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_out()
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-test.c466 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.ips = 1; in arm_smmu_test_make_s1_cd()
467 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.tg = 2; in arm_smmu_test_make_s1_cd()
468 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.sh = 3; in arm_smmu_test_make_s1_cd()
469 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.orgn = 1; in arm_smmu_test_make_s1_cd()
470 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.irgn = 2; in arm_smmu_test_make_s1_cd()
471 io_pgtable.cfg.arm_lpae_s1_cfg.tcr.tsz = 4; in arm_smmu_test_make_s1_cd()
/linux/drivers/tty/serial/
H A Dsunsab.h18 u8 tcr; /* Termination Character Register */ member
49 u8 tcr; member
85 u8 tcr; member
/linux/arch/arm64/kvm/hyp/vhe/
H A Dtlb.c16 u64 tcr; member
43 val = cxt->tcr = read_sysreg_el1(SYS_TCR); in enter_vmid_context()
85 write_sysreg_el1(cxt->tcr, SYS_TCR); in exit_vmid_context()
/linux/arch/powerpc/kvm/
H A Dbooke_emulate.c269 if (vcpu->arch.tcr & TCR_WRC_MASK) { in kvmppc_booke_emulate_mtspr()
271 spr_val |= vcpu->arch.tcr & TCR_WRC_MASK; in kvmppc_booke_emulate_mtspr()
446 *spr_val = vcpu->arch.tcr; in kvmppc_booke_emulate_mfspr()
H A Dbooke.c582 u32 period = TCR_GET_WP(vcpu->arch.tcr); in watchdog_next_timeout()
660 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && in kvmppc_watchdog_func()
679 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) in update_timer_ints()
684 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()
1522 sregs->u.e.tcr = vcpu->arch.tcr; in get_sregs_base()
1540 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); in set_sregs_base()
1708 *val = get_reg_val(id, vcpu->arch.tcr); in kvmppc_get_one_reg()
1781 u32 tcr = set_reg_val(id, *val); in kvmppc_set_one_reg() local
1782 kvmppc_set_tcr(vcpu, tcr); in kvmppc_set_one_reg()
1864 vcpu->arch.tcr = new_tcr; in kvmppc_set_tcr()
[all …]
/linux/drivers/dma/bestcomm/
H A Dfec.c124 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_rx_reset()
225 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_tx_reset()
/linux/drivers/i2c/busses/
H A Di2c-viai2c-common.c24 u16 val, tcr_val = i2c->tcr; in viai2c_write()
66 u16 val, tcr_val = i2c->tcr; in viai2c_read()
/linux/arch/mips/include/asm/
H A Dtxx9tmr.h15 u32 tcr; member
/linux/drivers/dma/sh/
H A Dshdma.h47 u32 tcr; /* TCR / transfer count */ member
/linux/arch/powerpc/platforms/52xx/
H A Dlite5200_pm.c181 out_be16(&bes->tcr[i], sbes.tcr[i]); in lite5200_restore_regs()

12