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Searched refs:tWH_min (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dnand_timings.c62 .tWH_min = 30000,
107 .tWH_min = 15000,
152 .tWH_min = 15000,
197 .tWH_min = 10000,
242 .tWH_min = 10000,
287 .tWH_min = 7000,
593 spec_timings->tWH_min <= onfi_timings->tWH_min && in onfi_find_closest_sdr_mode()
H A Dstm32_fmc2_nand.c1527 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1528 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1529 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
H A Dintel-nand-controller.c225 twrwait = DIV_ROUND_UP(max(timings->tWC_min, timings->tWH_min), period); in ebu_nand_set_timings()
H A Dcadence-nand-controller.c2532 (sdr->tWH_min + if_skew) <= (clk_period / 2)) { in cadence_nand_setup_sdr_interface()
2544 if (sdr->tWH_min >= twh) in cadence_nand_setup_sdr_interface()
2545 twh = sdr->tWH_min; in cadence_nand_setup_sdr_interface()
H A Dtegra_nand.c807 reg |= TIMING_TWH(OFFSET(DIV_ROUND_UP(timings->tWH_min, period), 1)); in tegra_nand_setup_timing()
H A Ddenali.c848 rdwr_en_hi = DIV_ROUND_UP(max(timings->tREH_min, timings->tWH_min), in denali_setup_interface()
H A Dmtk_nand.c571 twh = max(timings->tREH_min, timings->tWH_min) / 1000; in mtk_nfc_setup_interface()
/linux/include/linux/mtd/
H A Drawnand.h473 u32 tWH_min; member