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Searched refs:tCS_min (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dnand_timings.c44 .tCS_min = 70000,
89 .tCS_min = 35000,
134 .tCS_min = 25000,
179 .tCS_min = 25000,
224 .tCS_min = 20000,
269 .tCS_min = 15000,
316 .tCS_min = 35000,
358 .tCS_min = 25000,
400 .tCS_min = 15000,
442 .tCS_min = 15000,
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H A Dstm32_fmc2_nand.c1452 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1453 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1488 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1489 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
H A Dtegra_nand.c796 val = DIV_ROUND_UP(max(max(timings->tCS_min, timings->tCH_min), in tegra_nand_setup_timing()
H A Ddenali.c902 cs_setup = max3((int)DIV_ROUND_UP(timings->tCS_min, t_x) - rdwr_en_lo, in denali_setup_interface()
H A Dcadence-nand-controller.c2603 tcs_cnt = calc_cycl((sdr->tCS_min + if_skew), clk_period); in cadence_nand_setup_sdr_interface()
2749 tcs_cnt = calc_cycl((nvddr->tCS_min + if_skew), ddr_clk_ctrl_period); in cadence_nand_setup_nvddr_interface()
H A Dmxc_nand.c1067 timings->tCS_min > tRC_ps - 1000 || in mxc_nand_v2_setup_interface()
/linux/include/linux/mtd/
H A Drawnand.h455 u32 tCS_min; member
543 u32 tCS_min; member