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Searched refs:tADL_min (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dnand_timings.c32 .tADL_min = 400000,
77 .tADL_min = 400000,
122 .tADL_min = 400000,
167 .tADL_min = 400000,
212 .tADL_min = 400000,
257 .tADL_min = 400000,
307 .tADL_min = 400000,
349 .tADL_min = 400000,
391 .tADL_min = 400000,
433 .tADL_min = 400000,
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H A Dnand_toshiba.c39 PSEC_TO_NSEC(sdr->tADL_min)), in toshiba_nand_benand_read_eccstatus_op()
H A Dsunxi_nand.c1467 if (timings->tADL_min > (min_clk_period * 32)) in sunxi_nfc_setup_interface()
1468 min_clk_period = DIV_ROUND_UP(timings->tADL_min, 32); in sunxi_nfc_setup_interface()
1497 tADL = DIV_ROUND_UP(timings->tADL_min, min_clk_period) >> 3; in sunxi_nfc_setup_interface()
H A Dstm32_fmc2_nand.c1523 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1524 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1525 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
H A Dtegra_nand.c813 val = DIV_ROUND_UP(timings->tADL_min, period); in tegra_nand_setup_timing()
H A Dnand_base.c1545 NAND_OP_ADDR(0, addrs, NAND_COMMON_TIMING_NS(conf, tADL_min)), in nand_exec_prog_page_op()
1828 NAND_COMMON_TIMING_NS(conf, tADL_min)), in nand_readid_op()
1887 NAND_COMMON_TIMING_NS(conf, tADL_min)), in nand_status_op()
2030 tADL_min)), in nand_set_features_op()
H A Ddenali.c839 addr_2_data = DIV_ROUND_UP(timings->tADL_min, t_x); in denali_setup_interface()
H A Drenesas-nand-controller.c915 TIM_SEQ0_TADL(TO_CYCLES64(sdr->tADL_min, period_ns)) | in rnandc_setup_interface()
H A Dmeson_nand.c1268 meson_chip->tadl = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tADL_min), in meson_nfc_setup_interface()
H A Dcadence-nand-controller.c2511 tadl_cnt = calc_cycl((sdr->tADL_min + if_skew), clk_period); in cadence_nand_setup_interface()
H A Dmarvell_nand.c2420 nfc_tmg.tADL = TO_CYCLES(sdr->tADL_min, period_ns); in marvell_nfc_setup_interface()
/linux/include/linux/mtd/
H A Drawnand.h444 u32 tADL_min; member
534 u32 tADL_min; member
/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c1416 ncycles = DIV_ROUND_UP(conf->timings.sdr.tADL_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()