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Searched refs:t7xx_dev (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/net/wwan/t7xx/
H A Dt7xx_pci.c72 struct t7xx_pci_dev *t7xx_dev; in t7xx_mode_store() local
78 t7xx_dev = pci_get_drvdata(pdev); in t7xx_mode_store()
79 if (!t7xx_dev) in t7xx_mode_store()
82 mode = READ_ONCE(t7xx_dev->mode); in t7xx_mode_store()
92 WRITE_ONCE(t7xx_dev->mode, T7XX_FASTBOOT_SWITCHING); in t7xx_mode_store()
94 t7xx_reset_device(t7xx_dev, FASTBOOT); in t7xx_mode_store()
97 t7xx_reset_device(t7xx_dev, PLDR); in t7xx_mode_store()
108 struct t7xx_pci_dev *t7xx_dev; in t7xx_mode_show() local
112 t7xx_dev = pci_get_drvdata(pdev); in t7xx_mode_show()
113 if (!t7xx_dev) in t7xx_mode_show()
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H A Dt7xx_mhccif.c32 static void t7xx_mhccif_clear_interrupts(struct t7xx_pci_dev *t7xx_dev, u32 mask) in t7xx_mhccif_clear_interrupts() argument
34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_clear_interrupts()
39 t7xx_mhccif_read_sw_int_sts(t7xx_dev); in t7xx_mhccif_clear_interrupts()
41 t7xx_pcie_mac_clear_int_status(t7xx_dev, MHCCIF_INT); in t7xx_mhccif_clear_interrupts()
46 struct t7xx_pci_dev *t7xx_dev = data; in t7xx_mhccif_isr_thread() local
50 iowrite32(val, IREG_BASE(t7xx_dev) + DISABLE_ASPM_LOWPWR); in t7xx_mhccif_isr_thread()
52 int_status = t7xx_mhccif_read_sw_int_sts(t7xx_dev); in t7xx_mhccif_isr_thread()
54 int ret = t7xx_pci_mhccif_isr(t7xx_dev); in t7xx_mhccif_isr_thread()
57 dev_err(&t7xx_dev->pdev->dev, "PCI MHCCIF ISR failure: %d", ret); in t7xx_mhccif_isr_thread()
60 t7xx_mhccif_clear_interrupts(t7xx_dev, int_status); in t7xx_mhccif_isr_thread()
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H A Dt7xx_modem_ops.c66 static unsigned int t7xx_get_interrupt_status(struct t7xx_pci_dev *t7xx_dev) in t7xx_get_interrupt_status() argument
68 return t7xx_mhccif_read_sw_int_sts(t7xx_dev) & D2H_SW_INT_MASK; in t7xx_get_interrupt_status()
81 int t7xx_pci_mhccif_isr(struct t7xx_pci_dev *t7xx_dev) in t7xx_pci_mhccif_isr() argument
83 struct t7xx_modem *md = t7xx_dev->md; in t7xx_pci_mhccif_isr()
91 dev_err_ratelimited(&t7xx_dev->pdev->dev, in t7xx_pci_mhccif_isr()
97 int_sta = t7xx_get_interrupt_status(t7xx_dev); in t7xx_pci_mhccif_isr()
114 mask = t7xx_mhccif_mask_get(t7xx_dev); in t7xx_pci_mhccif_isr()
125 static void t7xx_clr_device_irq_via_pcie(struct t7xx_pci_dev *t7xx_dev) in t7xx_clr_device_irq_via_pcie() argument
127 struct t7xx_addr_base *pbase_addr = &t7xx_dev->base_addr; in t7xx_clr_device_irq_via_pcie()
137 void t7xx_clear_rgu_irq(struct t7xx_pci_dev *t7xx_dev) in t7xx_clear_rgu_irq() argument
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H A Dt7xx_pcie_mac.c82 static int t7xx_pcie_mac_atr_cfg(struct t7xx_pci_dev *t7xx_dev, struct t7xx_atr_config *cfg) in t7xx_pcie_mac_atr_cfg() argument
84 struct device *dev = &t7xx_dev->pdev->dev; in t7xx_pcie_mac_atr_cfg()
85 void __iomem *pbase = IREG_BASE(t7xx_dev); in t7xx_pcie_mac_atr_cfg()
135 void t7xx_pcie_mac_atr_init(struct t7xx_pci_dev *t7xx_dev) in t7xx_pcie_mac_atr_init() argument
142 t7xx_pcie_mac_atr_tables_dis(IREG_BASE(t7xx_dev), i); in t7xx_pcie_mac_atr_init()
146 cfg.src_addr = pci_resource_start(t7xx_dev->pdev, T7XX_PCIE_REG_BAR); in t7xx_pcie_mac_atr_init()
152 t7xx_pcie_mac_atr_tables_dis(IREG_BASE(t7xx_dev), cfg.port); in t7xx_pcie_mac_atr_init()
153 t7xx_pcie_mac_atr_cfg(t7xx_dev, &cfg); in t7xx_pcie_mac_atr_init()
155 t7xx_dev->base_addr.pcie_dev_reg_trsl_addr = T7XX_PCIE_REG_TRSL_ADDR_CHIP; in t7xx_pcie_mac_atr_init()
166 t7xx_pcie_mac_atr_tables_dis(IREG_BASE(t7xx_dev), cfg.port); in t7xx_pcie_mac_atr_init()
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H A Dt7xx_pci.h121 int (*suspend)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
122 void (*suspend_late)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
123 void (*resume_early)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
124 int (*resume)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
129 void t7xx_pci_disable_sleep(struct t7xx_pci_dev *t7xx_dev);
130 void t7xx_pci_enable_sleep(struct t7xx_pci_dev *t7xx_dev);
131 int t7xx_pci_sleep_disable_complete(struct t7xx_pci_dev *t7xx_dev);
132 int t7xx_pci_pm_entity_register(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
133 int t7xx_pci_pm_entity_unregister(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
134 void t7xx_pci_pm_init_late(struct t7xx_pci_dev *t7xx_dev);
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H A Dt7xx_pcie_mac.h21 #define IREG_BASE(t7xx_dev) ((t7xx_dev)->base_addr.pcie_mac_ireg_base) argument
23 void t7xx_pcie_mac_interrupts_en(struct t7xx_pci_dev *t7xx_dev);
24 void t7xx_pcie_mac_interrupts_dis(struct t7xx_pci_dev *t7xx_dev);
25 void t7xx_pcie_mac_atr_init(struct t7xx_pci_dev *t7xx_dev);
26 void t7xx_pcie_mac_clear_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
27 void t7xx_pcie_mac_set_int(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
28 void t7xx_pcie_mac_clear_int_status(struct t7xx_pci_dev *t7xx_dev, enum t7xx_int int_type);
29 void t7xx_pcie_set_mac_msix_cfg(struct t7xx_pci_dev *t7xx_dev, unsigned int irq_count);
H A Dt7xx_hif_dpmaif.c65 t7xx_pcie_mac_set_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int); in t7xx_dpmaif_enable_irq()
76 t7xx_pcie_mac_clear_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int); in t7xx_dpmaif_disable_irq()
96 t7xx_pcie_mac_clear_int_status(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int); in t7xx_dpmaif_irq_cb()
154 t7xx_pcie_mac_clear_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int); in t7xx_dpmaif_isr_handler()
165 t7xx_pcie_mac_set_int(dpmaif_ctrl->t7xx_dev, isr_para->pcie_int); in t7xx_dpmaif_isr_thread()
187 struct t7xx_pci_dev *t7xx_dev = dpmaif_ctrl->t7xx_dev; in t7xx_dpmaif_register_pcie_irq() local
197 t7xx_pcie_mac_clear_int(t7xx_dev, int_type); in t7xx_dpmaif_register_pcie_irq()
199 t7xx_dev->intr_handler[int_type] = t7xx_dpmaif_isr_handler; in t7xx_dpmaif_register_pcie_irq()
200 t7xx_dev->intr_thread[int_type] = t7xx_dpmaif_isr_thread; in t7xx_dpmaif_register_pcie_irq()
201 t7xx_dev->callback_param[int_type] = isr_para; in t7xx_dpmaif_register_pcie_irq()
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H A Dt7xx_mhccif.h31 void t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val);
32 void t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val);
33 u32 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev);
34 void t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev);
35 u32 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev);
36 void t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel);
H A Dt7xx_modem_ops.h67 struct t7xx_pci_dev *t7xx_dev; member
89 int t7xx_md_reset(struct t7xx_pci_dev *t7xx_dev);
90 int t7xx_md_init(struct t7xx_pci_dev *t7xx_dev);
91 void t7xx_md_exit(struct t7xx_pci_dev *t7xx_dev);
92 void t7xx_clear_rgu_irq(struct t7xx_pci_dev *t7xx_dev);
93 int t7xx_reset_device(struct t7xx_pci_dev *t7xx_dev, enum reset_type type);
94 int t7xx_pci_mhccif_isr(struct t7xx_pci_dev *t7xx_dev);
H A Dt7xx_netdev.c399 static void init_md_status_notifier(struct t7xx_pci_dev *t7xx_dev) in init_md_status_notifier() argument
401 struct t7xx_ccmni_ctrl *ctlb = t7xx_dev->ccmni_ctlb; in init_md_status_notifier()
409 t7xx_fsm_notifier_register(t7xx_dev->md, md_status_notifier); in init_md_status_notifier()
467 static void t7xx_ccmni_queue_state_notify(struct t7xx_pci_dev *t7xx_dev, in t7xx_ccmni_queue_state_notify() argument
470 struct t7xx_ccmni_ctrl *ctlb = t7xx_dev->ccmni_ctlb; in t7xx_ccmni_queue_state_notify()
476 dev_warn(&t7xx_dev->pdev->dev, "No netdev registered yet\n"); in t7xx_ccmni_queue_state_notify()
486 int t7xx_ccmni_init(struct t7xx_pci_dev *t7xx_dev) in t7xx_ccmni_init() argument
488 struct device *dev = &t7xx_dev->pdev->dev; in t7xx_ccmni_init()
496 t7xx_dev->ccmni_ctlb = ctlb; in t7xx_ccmni_init()
497 ctlb->t7xx_dev = t7xx_dev; in t7xx_ccmni_init()
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H A Dt7xx_state_monitor.c54 20000000, false, IREG_BASE(md->t7xx_dev) + \
132 struct device *dev = &ctl->md->t7xx_dev->pdev->dev; in fsm_flush_event_cmd_qs()
186 struct device *dev = &ctl->md->t7xx_dev->pdev->dev; in fsm_routine_exception()
205 t7xx_pci_pm_exp_detected(ctl->md->t7xx_dev); in fsm_routine_exception()
231 dev = &md->t7xx_dev->pdev->dev; in t7xx_lk_stage_event_handling()
251 t7xx_mode_update(md->t7xx_dev, T7XX_FASTBOOT_DOWNLOAD); in t7xx_lk_stage_event_handling()
253 t7xx_mode_update(md->t7xx_dev, T7XX_FASTBOOT_DUMP); in t7xx_lk_stage_event_handling()
268 mode = READ_ONCE(ctl->md->t7xx_dev->mode); in fsm_stopped_handler()
273 return t7xx_md_reset(ctl->md->t7xx_dev); in fsm_stopped_handler()
289 struct t7xx_pci_dev *t7xx_dev = ctl->md->t7xx_dev; in fsm_routine_stopping() local
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H A Dt7xx_port_proxy.c193 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl; in t7xx_port_get_queue_no()
262 md_ctrl = port->t7xx_dev->md->md_ctrl[path_id]; in t7xx_get_port_mtu()
272 md_ctrl = port->t7xx_dev->md->md_ctrl[path_id]; in t7xx_port_send_raw_skb()
326 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl; in t7xx_port_send_skb()
392 struct t7xx_pci_dev *t7xx_dev = queue->md_ctrl->t7xx_dev; in t7xx_port_proxy_recv_skb_from_dedicated_queue() local
393 struct port_proxy *port_prox = t7xx_dev->md->port_prox; in t7xx_port_proxy_recv_skb_from_dedicated_queue()
414 static struct t7xx_port *t7xx_port_proxy_find_port(struct t7xx_pci_dev *t7xx_dev, in t7xx_port_proxy_find_port() argument
417 struct port_proxy *port_prox = t7xx_dev->md->port_prox; in t7xx_port_proxy_find_port()
447 struct t7xx_pci_dev *t7xx_dev = queue->md_ctrl->t7xx_dev; in t7xx_port_proxy_recv_skb() local
448 struct t7xx_fsm_ctl *ctl = t7xx_dev->md->fsm_ctl; in t7xx_port_proxy_recv_skb()
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H A Dt7xx_netdev.h43 struct t7xx_pci_dev *t7xx_dev; member
57 int t7xx_ccmni_init(struct t7xx_pci_dev *t7xx_dev);
58 void t7xx_ccmni_exit(struct t7xx_pci_dev *t7xx_dev);
H A Dt7xx_hif_dpmaif.h164 void (*state_notify)(struct t7xx_pci_dev *t7xx_dev,
172 struct t7xx_pci_dev *t7xx_dev; member
194 struct dpmaif_ctrl *t7xx_dpmaif_hif_init(struct t7xx_pci_dev *t7xx_dev,
H A Dt7xx_port_trace.c54 struct dentry *debugfs_dir = port->t7xx_dev->debugfs_dir; in t7xx_trace_port_uninit()
104 port->t7xx_dev->debugfs_dir = debugfs_dir; in t7xx_port_trace_md_state_notify()
H A Dt7xx_port_ctrl_msg.c60 struct device *dev = &ctl->md->t7xx_dev->pdev->dev; in fsm_ee_message_handler()
129 struct device *dev = &md->t7xx_dev->pdev->dev; in t7xx_port_enum_msg_handler()
161 struct t7xx_fsm_ctl *ctl = port->t7xx_dev->md->fsm_ctl; in control_msg_handler()