Searched refs:sz_lg2 (Results 1 – 2 of 2) sorted by relevance
955 u8 sz_lg2; member974 tlbi->range.sz_lg2 = 0; in riscv_iommu_tlbi_calc()983 tlbi->range.sz_lg2 = fls64(tlbi->start ^ tlbi->last); in riscv_iommu_tlbi_calc()984 if (unlikely(tlbi->range.sz_lg2 >= 64)) { in riscv_iommu_tlbi_calc()986 tlbi->range.sz_lg2 = 0; in riscv_iommu_tlbi_calc()989 tlbi->range.addr = tlbi->start & ~(BIT_U64(tlbi->range.sz_lg2) - 1); in riscv_iommu_tlbi_calc()1025 tlbi->range.sz_lg2 >= 13) { in riscv_iommu_iotlb_inval_iommu()1027 tlbi->range.sz_lg2); in riscv_iommu_iotlb_inval_iommu()
1305 unsigned int sz_lg2; in build_inv_address() local1308 sz_lg2 = fls64(address ^ last); in build_inv_address()1309 if (sz_lg2 <= 12) in build_inv_address()1324 if (unlikely(sz_lg2 > 52)) in build_inv_address()1333 if (sz_lg2 > 13) in build_inv_address()1334 address |= GENMASK_U64(sz_lg2 - 2, 12); in build_inv_address()1836 unsigned int sz_lg2 = ilog2(last - address + 1); in amd_iommu_domain_flush_pages() local1840 sz_lg2 = min_t(unsigned int, sz_lg2, __ffs64(address)); in amd_iommu_domain_flush_pages()1842 flush_last = address + (1ULL << sz_lg2) - 1; in amd_iommu_domain_flush_pages()