| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_gem_submit.c | 25 #define SUBMIT_ERROR(err, submit, fmt, ...) \ argument
26 UERR(err, (submit)->dev, fmt, ##__VA_ARGS__)
38 struct msm_gem_submit *submit; in submit_create() local
42 sz = size_add(struct_size(submit, bos, nr_bos), in submit_create()
43 array_size(sizeof(submit->cmd[0]), nr_cmds)); in submit_create()
45 submit = kzalloc(sz, GFP_KERNEL | __GFP_NOWARN); in submit_create()
46 if (!submit) in submit_create()
49 submit->hw_fence = msm_fence_alloc(); in submit_create()
50 if (IS_ERR(submit->hw_fence)) { in submit_create()
51 ret = PTR_ERR(submit->hw_fence); in submit_create()
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| H A D | msm_gpu.c | 258 static void crashstate_get_bos(struct msm_gpu_state *state, struct msm_gem_submit *submit) in crashstate_get_bos() argument
262 if (msm_context_is_vmbind(submit->queue->ctx)) { in crashstate_get_bos()
271 drm_exec_lock_obj(&exec, drm_gpuvm_resv_obj(submit->vm)); in crashstate_get_bos()
274 drm_gpuvm_for_each_va (vma, submit->vm) { in crashstate_get_bos()
285 drm_gpuvm_for_each_va (vma, submit->vm) in crashstate_get_bos()
291 drm_gpuvm_for_each_va(vma, submit->vm) { in crashstate_get_bos()
304 state->bos = kcalloc(submit->nr_bos, in crashstate_get_bos()
307 for (int i = 0; state->bos && i < submit->nr_bos; i++) { in crashstate_get_bos()
308 struct drm_gem_object *obj = submit->bos[i].obj; in crashstate_get_bos()
309 bool dump = rd_full || (submit->bos[i].flags & MSM_SUBMIT_BO_DUMP); in crashstate_get_bos()
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| H A D | msm_ringbuffer.c | 16 struct msm_gem_submit *submit = to_msm_submit(job); in msm_job_run() local
17 struct msm_fence_context *fctx = submit->ring->fctx; in msm_job_run()
18 struct msm_gpu *gpu = submit->gpu; in msm_job_run()
20 unsigned nr_cmds = submit->nr_cmds; in msm_job_run()
23 msm_fence_init(submit->hw_fence, fctx); in msm_job_run()
27 for (i = 0; i < submit->nr_bos; i++) { in msm_job_run()
28 struct drm_gem_object *obj = submit->bos[i].obj; in msm_job_run()
33 submit->bos_pinned = false; in msm_job_run()
40 if (submit->queue->ctx->closed) in msm_job_run()
41 submit->nr_cmds = 0; in msm_job_run()
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| H A D | msm_rd.c | 338 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, in msm_rd_dump_submit() argument
362 task = pid_task(submit->pid, PIDTYPE_PID); in msm_rd_dump_submit()
366 pid_nr(submit->pid), submit->seqno); in msm_rd_dump_submit()
369 pid_nr(submit->pid), submit->seqno); in msm_rd_dump_submit()
375 if (msm_context_is_vmbind(submit->queue->ctx)) { in msm_rd_dump_submit()
378 drm_gpuvm_resv_assert_held(submit->vm); in msm_rd_dump_submit()
380 drm_gpuvm_for_each_va (vma, submit->vm) { in msm_rd_dump_submit()
392 for (i = 0; i < submit->nr_bos; i++) { in msm_rd_dump_submit()
393 struct drm_gem_object *obj = submit->bos[i].obj; in msm_rd_dump_submit()
394 bool dump = rd_full || (submit->bos[i].flags & MSM_SUBMIT_BO_DUMP); in msm_rd_dump_submit()
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| H A D | msm_gem.h | 491 static inline void msm_gem_submit_get(struct msm_gem_submit *submit) in msm_gem_submit_get() argument
493 kref_get(&submit->ref); in msm_gem_submit_get()
496 static inline void msm_gem_submit_put(struct msm_gem_submit *submit) in msm_gem_submit_put() argument
498 kref_put(&submit->ref, __msm_gem_submit_destroy); in msm_gem_submit_put()
501 void msm_submit_retire(struct msm_gem_submit *submit);
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| /linux/drivers/gpu/drm/virtio/ |
| H A D | virtgpu_submit.c | 48 static int virtio_gpu_do_fence_wait(struct virtio_gpu_submit *submit, in virtio_gpu_do_fence_wait() argument
51 u64 context = submit->fence_ctx + submit->ring_idx; in virtio_gpu_do_fence_wait()
59 static int virtio_gpu_dma_fence_wait(struct virtio_gpu_submit *submit, in virtio_gpu_dma_fence_wait() argument
67 err = virtio_gpu_do_fence_wait(submit, f); in virtio_gpu_dma_fence_wait()
91 virtio_gpu_parse_deps(struct virtio_gpu_submit *submit) in virtio_gpu_parse_deps() argument
93 struct drm_virtgpu_execbuffer *exbuf = submit->exbuf; in virtio_gpu_parse_deps()
131 ret = drm_syncobj_find_fence(submit->file, syncobj_desc.handle, in virtio_gpu_parse_deps()
136 ret = virtio_gpu_dma_fence_wait(submit, fence); in virtio_gpu_parse_deps()
143 syncobjs[i] = drm_syncobj_find(submit->file, in virtio_gpu_parse_deps()
157 submit->num_in_syncobjs = num_in_syncobjs; in virtio_gpu_parse_deps()
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| /linux/drivers/gpu/drm/lima/ |
| H A D | lima_gem.c | 280 static int lima_gem_add_deps(struct drm_file *file, struct lima_submit *submit) in lima_gem_add_deps() argument
284 for (i = 0; i < ARRAY_SIZE(submit->in_sync); i++) { in lima_gem_add_deps()
285 if (!submit->in_sync[i]) in lima_gem_add_deps()
288 err = drm_sched_job_add_syncobj_dependency(&submit->task->base, file, in lima_gem_add_deps()
289 submit->in_sync[i], 0); in lima_gem_add_deps()
297 int lima_gem_submit(struct drm_file *file, struct lima_submit *submit) in lima_gem_submit() argument
305 struct lima_bo **bos = submit->lbos; in lima_gem_submit()
307 if (submit->out_sync) { in lima_gem_submit()
308 out_sync = drm_syncobj_find(file, submit->out_sync); in lima_gem_submit()
313 for (i = 0; i < submit->nr_bos; i++) { in lima_gem_submit()
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| H A D | lima_drv.c | 111 struct lima_submit submit = {0}; in lima_ioctl_gem_submit() local
125 bos = kvcalloc(args->nr_bos, sizeof(*submit.bos) + sizeof(*submit.lbos), GFP_KERNEL); in lima_ioctl_gem_submit()
129 size = args->nr_bos * sizeof(*submit.bos); in lima_ioctl_gem_submit()
157 submit.pipe = args->pipe; in lima_ioctl_gem_submit()
158 submit.bos = bos; in lima_ioctl_gem_submit()
159 submit.lbos = (void *)bos + size; in lima_ioctl_gem_submit()
160 submit.nr_bos = args->nr_bos; in lima_ioctl_gem_submit()
161 submit.task = task; in lima_ioctl_gem_submit()
162 submit.ctx = ctx; in lima_ioctl_gem_submit()
163 submit.flags = args->flags; in lima_ioctl_gem_submit()
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| /linux/drivers/gpu/drm/etnaviv/ |
| H A D | etnaviv_dump.c | 118 void etnaviv_core_dump(struct etnaviv_gem_submit *submit) in etnaviv_core_dump() argument
120 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_core_dump()
133 mutex_lock(&submit->mmu_context->lock); in etnaviv_core_dump()
135 mmu_size = etnaviv_iommu_dump_size(submit->mmu_context); in etnaviv_core_dump()
142 mmu_size + gpu->buffer.size + submit->cmdbuf.size; in etnaviv_core_dump()
145 for (i = 0; i < submit->nr_bos; i++) { in etnaviv_core_dump()
146 obj = submit->bos[i].obj; in etnaviv_core_dump()
164 mutex_unlock(&submit->mmu_context->lock); in etnaviv_core_dump()
176 etnaviv_core_dump_mmu(&iter, submit->mmu_context, mmu_size); in etnaviv_core_dump()
180 &submit->mmu_context->cmdbuf_mapping)); in etnaviv_core_dump()
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| H A D | etnaviv_gpu.c | 1367 const struct etnaviv_gem_submit *submit = event->submit; in sync_point_perfmon_sample() local
1370 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample()
1371 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; in sync_point_perfmon_sample()
1374 etnaviv_perfmon_process(gpu, pmr, submit->exec_state); in sync_point_perfmon_sample()
1398 const struct etnaviv_gem_submit *submit = event->submit; in sync_point_perfmon_sample_post() local
1413 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample_post()
1414 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; in sync_point_perfmon_sample_post()
1422 struct dma_fence *etnaviv_gpu_submit(struct etnaviv_gem_submit *submit) in etnaviv_gpu_submit() argument
1424 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_gpu_submit()
1436 if (submit->nr_pmrs) in etnaviv_gpu_submit()
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| H A D | etnaviv_sched.h | 21 int etnaviv_sched_push_job(struct etnaviv_gem_submit *submit);
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| H A D | etnaviv_dump.h | 39 void etnaviv_core_dump(struct etnaviv_gem_submit *submit);
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| /linux/crypto/async_tx/ |
| H A D | raid6test.c | 60 struct async_submit_ctl submit; in raid6_dual_recov() local
71 init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); in raid6_dual_recov()
73 disks, bytes, &submit); in raid6_dual_recov()
91 init_async_submit(&submit, ASYNC_TX_XOR_ZERO_DST, NULL, in raid6_dual_recov()
93 tx = async_xor(dest, blocks, 0, count, bytes, &submit); in raid6_dual_recov()
95 init_async_submit(&submit, 0, tx, NULL, NULL, addr_conv); in raid6_dual_recov()
97 disks, bytes, &submit); in raid6_dual_recov()
102 init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); in raid6_dual_recov()
104 faila, ptrs, offs, &submit); in raid6_dual_recov()
107 init_async_submit(&submit, 0, NULL, NULL, NULL, addr_conv); in raid6_dual_recov()
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| H A D | async_tx.c | 43 __async_tx_find_channel(struct async_submit_ctl *submit, in __async_tx_find_channel() argument
46 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; in __async_tx_find_channel()
144 struct async_submit_ctl *submit) in async_tx_submit() argument
146 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; in async_tx_submit()
148 tx->callback = submit->cb_fn; in async_tx_submit()
149 tx->callback_param = submit->cb_param; in async_tx_submit()
204 if (submit->flags & ASYNC_TX_ACK) in async_tx_submit()
221 async_trigger_callback(struct async_submit_ctl *submit) in async_trigger_callback() argument
226 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; in async_trigger_callback()
245 async_tx_submit(chan, tx, submit); in async_trigger_callback()
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| H A D | async_memcpy.c | 34 struct async_submit_ctl *submit) in async_memcpy() argument
36 struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY, in async_memcpy()
48 if (submit->cb_fn) in async_memcpy()
50 if (submit->flags & ASYNC_TX_FENCE) in async_memcpy()
70 async_tx_submit(chan, tx, submit); in async_memcpy()
76 async_tx_quiesce(&submit->depend_tx); in async_memcpy()
86 async_tx_sync_epilog(submit); in async_memcpy()
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a5xx_gpu.c | 66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb() argument
70 struct msm_ringbuffer *ring = submit->ring; in a5xx_submit_in_rb()
75 for (i = 0; i < submit->nr_cmds; i++) { in a5xx_submit_in_rb()
76 switch (submit->cmd[i].type) { in a5xx_submit_in_rb()
80 if (ring->cur_ctx_seqno == submit->queue->ctx->seqno) in a5xx_submit_in_rb()
85 obj = submit->bos[submit->cmd[i].idx].obj; in a5xx_submit_in_rb()
86 dwords = submit->cmd[i].size; in a5xx_submit_in_rb()
114 a5xx_gpu->last_seqno[ring->id] = submit->seqno; in a5xx_submit_in_rb()
123 ring->memptrs->fence = submit->seqno; in a5xx_submit_in_rb()
127 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit() argument
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| H A D | a3xx_gpu.c | 33 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit() argument
35 struct msm_ringbuffer *ring = submit->ring; in a3xx_submit()
38 for (i = 0; i < submit->nr_cmds; i++) { in a3xx_submit()
39 switch (submit->cmd[i].type) { in a3xx_submit()
45 if (ring->cur_ctx_seqno == submit->queue->ctx->seqno) in a3xx_submit()
50 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a3xx_submit()
51 OUT_RING(ring, submit->cmd[i].size); in a3xx_submit()
58 OUT_RING(ring, submit->seqno); in a3xx_submit()
75 OUT_RING(ring, submit->seqno); in a3xx_submit()
621 .submit = a3xx_submit,
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| H A D | a6xx_gpu.c | 234 struct msm_ringbuffer *ring, struct msm_gem_submit *submit) in a6xx_set_pagetable() argument
237 struct msm_context *ctx = submit->queue->ctx; in a6xx_set_pagetable()
256 OUT_RING(ring, submit->seqno - 1); in a6xx_set_pagetable()
360 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit() argument
362 unsigned int index = submit->seqno % MSM_GPU_SUBMIT_STATS_COUNT; in a6xx_submit()
365 struct msm_ringbuffer *ring = submit->ring; in a6xx_submit()
370 a6xx_set_pagetable(a6xx_gpu, ring, submit); in a6xx_submit()
391 for (i = 0; i < submit->nr_cmds; i++) { in a6xx_submit()
392 switch (submit->cmd[i].type) { in a6xx_submit()
396 if (ring->cur_ctx_seqno == submit->queue->ctx->seqno) in a6xx_submit()
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| /linux/fs/iomap/ |
| H A D | direct-io.c | 46 } submit; member
193 struct task_struct *waiter = dio->submit.waiter; in iomap_dio_done()
195 WRITE_ONCE(dio->submit.waiter, NULL); in iomap_dio_done()
344 nr_vecs = bio_iov_bounce_nr_vecs(dio->submit.iter, op); in iomap_dio_bio_iter_one()
346 nr_vecs = bio_iov_vecs_to_alloc(dio->submit.iter, BIO_MAX_VECS); in iomap_dio_bio_iter_one()
358 ret = bio_iov_iter_bounce(bio, dio->submit.iter, in iomap_dio_bio_iter_one()
361 ret = bio_iov_iter_get_pages(bio, dio->submit.iter, in iomap_dio_bio_iter_one()
393 if (iov_iter_count(dio->submit.iter)) in iomap_dio_bio_iter_one()
527 orig_count = iov_iter_count(dio->submit.iter); in iomap_dio_bio_iter()
528 iov_iter_truncate(dio->submit.iter, length); in iomap_dio_bio_iter()
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | firewall.c | 9 struct tegra_drm_submit_data *submit; member
31 for (i = 0; i < fw->submit->num_used_mappings; i++) { in fw_check_addr_valid()
32 struct tegra_drm_mapping *m = fw->submit->used_mappings[i].mapping; in fw_check_addr_valid()
145 u32 words, struct tegra_drm_submit_data *submit, in tegra_drm_fw_validate() argument
149 .submit = submit, in tegra_drm_fw_validate()
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| H A D | submit.h | 18 u32 words, struct tegra_drm_submit_data *submit,
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| /linux/Documentation/translations/ja_JP/process/ |
| H A D | submitting-patches.rst | 27 Documentation/process/submit-checklist.rst を読んでください。
443 have the right to submit it under the open source license
448 license and I have the right under that license to submit that
451 permitted to submit under a different license), as indicated
460 personal information I submit with it, including my sign-off) is
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| /linux/Documentation/gpu/rfc/ |
| H A D | i915_scheduler.rst | 27 * After I915_CONTEXT_ENGINES_EXT_PARALLEL a user can submit N batches to
92 whether a submission is a single context submit or parallel submit isn't known
93 until execbuf time activated via the I915_SUBMIT_FENCE. To submit multiple
148 submit N BBs in a single execbuf2 IOCTL. The BBs are either the last N objects
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| /linux/drivers/gpu/drm/ci/xfails/ |
| H A D | panfrost-g12b-fails.txt | 2 panfrost/panfrost_submit@pan-submit-error-bad-requirements,Fail
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| /linux/drivers/staging/fbtft/ |
| H A D | TODO | 1 * convert all these over to drm_simple_display_pipe and submit for inclusion
|