Searched refs:stvec (Results 1 – 2 of 2) sorted by relevance
337 vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)guest_unexp_trap); in vm_arch_vcpu_add() 431 vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)&exception_vectors); in vcpu_init_vector_tables()
2826 0x80x0 0000 0300 0002 stvec Supervisor trap vector base