Searched refs:ssc_enable (Results 1 – 6 of 6) sorted by relevance
40 u32 ssc_enable; /* SSC recv/trans enable */ member
233 .ssc_enable = fhctl_ssc_enable,263 fh->ops->ssc_enable(fh, state.ssc_rate); in fhctl_hw_init()
180 uint32_t ssc_enable; in dcn314_is_spll_ssc_enabled() local182 REG_GET(CLK6_0_CLK6_spll_field_8, spll_ssc_en, &ssc_enable); in dcn314_is_spll_ssc_enabled()184 return ssc_enable == 1; in dcn314_is_spll_ssc_enabled()
1254 enum clk_type_t clk_type, int ssc_enable) in xgene_phy_hw_init_sata() argument1290 if (ssc_enable) in xgene_phy_hw_init_sata()1319 int ssc_enable) in xgene_phy_hw_initialize() argument1326 rc = xgene_phy_hw_init_sata(ctx, clk_type, ssc_enable); in xgene_phy_hw_initialize()
727 uint32_t ssc_enable; in dcn35_is_spll_ssc_enabled() local730 ssc_enable = REG_READ(CLK6_spll_field_8) & CLK6_spll_field_8__spll_ssc_en_MASK; in dcn35_is_spll_ssc_enabled()732 ssc_enable = REG_READ(CLK5_spll_field_8) & CLK5_spll_field_8__spll_ssc_en_MASK; in dcn35_is_spll_ssc_enabled()735 return ssc_enable != 0; in dcn35_is_spll_ssc_enabled()
547 bool ssc_enable; member742 if (pll->ssc_enable) in stm32f4_pll_set_rate()868 pll->ssc_enable = true; in stm32f4_pll_init_ssc()