/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dwb.c | 79 CNV_SOURCE_HEIGHT, params->cnv_params.src_height); in dwb2_config_dwb_cnv() 105 (params->cnv_params.src_height != params->dest_height)) { in dwb2_enable() 165 (params->cnv_params.src_height != params->dest_height)) { in dwb2_update() 295 dwb_program_vert_scalar(dwbc20, params->cnv_params.src_height, in dwb2_set_scaler()
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H A D | dcn20_dwb_scl.c | 801 uint32_t src_height, in dwb_program_vert_scalar() argument 824 src_height, dest_height); in dwb_program_vert_scalar()
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H A D | dcn20_dwb.h | 418 uint32_t src_height,
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/linux/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_plane.c | 121 int src_width, src_height, dst_height, fps; in _dpu_plane_calc_bw() local 130 src_height = drm_rect_height(&pipe_cfg->src_rect); in _dpu_plane_calc_bw() 137 scale_factor = src_height > dst_height ? in _dpu_plane_calc_bw() 138 mult_frac(src_height, 1, dst_height) : 1; in _dpu_plane_calc_bw() 168 int dst_width, src_height, dst_height, fps; in _dpu_plane_calc_clk() local 171 src_height = drm_rect_height(&pipe_cfg->src_rect); in _dpu_plane_calc_clk() 179 if (src_height > dst_height) { in _dpu_plane_calc_clk() 180 plane_clk *= src_height; in _dpu_plane_calc_clk() 467 scale_cfg->src_height[i] = src_h; in _dpu_plane_setup_scaler3() 470 scale_cfg->src_height[i] /= chroma_subsmpl_v; in _dpu_plane_setup_scaler3() [all …]
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H A D | dpu_hw_util.h | 127 u32 src_height[DPU_MAX_PLANES]; member 289 uint32_t src_height[DPU_MAX_PLANES]; member
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H A D | dpu_hw_util.c | 311 ((scaler3_cfg->src_height[0] & 0x1FFFF) << 16); in dpu_hw_setup_scaler3() 314 ((scaler3_cfg->src_height[1] & 0x1FFFF) << 16); in dpu_hw_setup_scaler3()
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/linux/include/uapi/linux/ |
H A D | ivtv.h | 59 __u32 src_height; member
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/linux/drivers/media/common/v4l2-tpg/ |
H A D | v4l2-tpg-core.c | 93 tpg->src_height = tpg->buf_height = h; in tpg_init() 529 tpg->src_height = height; in tpg_reset_source() 1608 return (line * 8) / tpg->src_height; in tpg_get_pat_line() 1610 return line == tpg->src_height / 2; in tpg_get_pat_line() 1612 return (line + 1) / 2 == tpg->src_height / 4; in tpg_get_pat_line() 1614 return (line + 10) / 20 == tpg->src_height / 40; in tpg_get_pat_line() 1713 unsigned h = tpg->src_height; in tpg_calculate_square_border() 2121 tpg->mv_vert_step = tpg->src_height - tpg->mv_vert_step; in tpg_update_mv_step() 2249 tpg->src_width, tpg->src_height, in tpg_log_status() 2306 params->mv_vert_old = tpg->mv_vert_count % tpg->src_height; in tpg_fill_params_pattern() [all …]
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/linux/drivers/media/platform/amphion/ |
H A D | vpu_codec.h | 18 u32 src_height; member
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H A D | vpu_windsor.c | 405 u32 src_height; member 992 windsor->src_height = params->src_height; in vpu_windsor_set_size()
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/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dm_services_types.h | 127 uint32_t src_height; member
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H A D | dc_types.h | 402 unsigned int src_height; /* input active height (half-active height in interlaced mode) */ member
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/linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
H A D | dcn30_dwb.c | 72 FC_SOURCE_HEIGHT, params->cnv_params.src_height); in dwb3_config_fc()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
H A D | dce110_clk_mgr.c | 149 cfg->src_height = stream->src.height; in dce110_fill_display_configs()
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/linux/drivers/gpu/drm/amd/display/dc/basics/ |
H A D | dce_calcs.c | 403 data->src_height[maximum_number_of_surfaces - 2] = data->src_height[5]; in calculate_bandwidth() 404 data->src_height[maximum_number_of_surfaces - 1] = data->src_height[5]; in calculate_bandwidth() 440 data->src_height_after_surface_type = bw_div(data->src_height[i], bw_int_to_fixed(2)); in calculate_bandwidth() 447 data->src_height_after_surface_type = data->src_height[i]; in calculate_bandwidth() 1436 …sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scal… in calculate_bandwidth() 1440 …sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scal… in calculate_bandwidth() 1998 …add(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[i], bw_sub(bw_div(data->src_height[i], data->v_scal… in calculate_bandwidth() 2827 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height); in populate_initial_data() 2880 …data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.v… in populate_initial_data() 2930 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height); in populate_initial_data() [all …]
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H A D | calcs_logger.h | 428 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] src_height[%d]:%d", i, bw_fixed_to_int(data->src_height[i])); in print_bw_calcs_data()
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/linux/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | dce_calcs.h | 394 struct bw_fixed src_height[maximum_number_of_surfaces]; member
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | dcn30_fpu.c | 286 wb_info->dwb_params.cnv_params.src_height; in dcn30_fpu_populate_dml_writeback_from_context() 311 (double)wb_info->dwb_params.cnv_params.src_height / in dcn30_fpu_populate_dml_writeback_from_context()
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/linux/include/media/tpg/ |
H A D | v4l2-tpg.h | 135 unsigned src_width, src_height; member
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/linux/drivers/media/pci/ivtv/ |
H A D | ivtv-yuv.c | 991 nf->tru_h = args->src_height; in ivtv_yuv_setup_frame() 1128 dma_args.src_height = yi->v4l2_src_h; in ivtv_yuv_setup_stream_frame()
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/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clk_mgr.c | 525 cfg->src_height = stream->src.height; in dce110_fill_display_configs()
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/linux/include/uapi/drm/ |
H A D | i915_drm.h | 1869 __u16 src_height; member
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/linux/tools/include/uapi/drm/ |
H A D | i915_drm.h | 1869 __u16 src_height; member
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/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_translation_helper.c | 1220 wb_info->dwb_params.cnv_params.src_height; in populate_dml_writeback_cfg_from_stream_state() 1235 (double)wb_info->dwb_params.cnv_params.src_height / in populate_dml_writeback_cfg_from_stream_state()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.c | 2506 wb_info->dwb_params.cnv_params.src_height; in dcn201_populate_dml_writeback_from_context_fpu() 2524 (double)wb_info->dwb_params.cnv_params.src_height / in dcn201_populate_dml_writeback_from_context_fpu()
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