| /linux/arch/parisc/kernel/ |
| H A D | pacache.S | 79 mtsp %r20, %sr1
85 pitlbe %r0(%sr1, %r28)
86 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
94 mtsp %r20, %sr1
100 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
123 mtsp %r20, %sr1
129 pdtlbe %r0(%sr1, %r28)
130 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
138 mtsp %r20, %sr1
144 pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
[all …]
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| H A D | entry.S | 1204 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1205 mtsp spc,%sr1
1207 idtlba pte,(%sr1,va)
1208 idtlbp prot,(%sr1,va)
1210 mtsp t1, %sr1 /* Restore sr1 */
1238 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1239 mtsp spc,%sr1
1241 idtlba pte,(%sr1,va)
1242 idtlbp prot,(%sr1,va)
1244 mtsp t1, %sr1 /* Restore sr1 */
[all …]
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| H A D | head.S | 289 mtsp %r0,%sr1
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| H A D | syscall.S | 306 mfsp %sr1,%r2
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv40.c | 75 u8 sr1[2]; in nv40_ram_prog() local
85 sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000)); in nv40_ram_prog()
86 if (!(sr1[i] & 0x20)) in nv40_ram_prog()
112 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20); in nv40_ram_prog()
172 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i]); in nv40_ram_prog()
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| /linux/arch/powerpc/platforms/ps3/ |
| H A D | spu.c | 90 u64 sr1; member
350 spu_pdata(spu)->cache.sr1 = 0x33; in ps3_create_spu()
531 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
538 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed)); in mfc_sr1_set()
540 spu_pdata(spu)->cache.sr1 = sr1; in mfc_sr1_set()
544 spu_pdata(spu)->cache.sr1); in mfc_sr1_set()
549 return spu_pdata(spu)->cache.sr1; in mfc_sr1_get()
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| /linux/arch/powerpc/platforms/cell/spufs/ |
| H A D | run.c | 86 u64 sr1; in spu_setup_isolated() local
125 sr1 = spu_mfc_sr1_get(ctx->spu); in spu_setup_isolated()
126 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
127 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
169 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
170 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
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| H A D | hw_ops.c | 228 u64 sr1; in spu_hw_master_start() local
231 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_start()
232 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_start()
239 u64 sr1; in spu_hw_master_stop() local
242 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_stop()
243 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_stop()
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| H A D | backing_ops.c | 298 u64 sr1; in spu_backing_master_start() local
301 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
302 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
309 u64 sr1; in spu_backing_master_stop() local
312 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
313 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
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| /linux/arch/parisc/include/asm/ |
| H A D | kgdb.h | 46 unsigned long sr1; member
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| H A D | asmregs.h | 70 sr1: .reg %sr1
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| H A D | assembly.h | 464 SAVE_SP (%sr1, PT_SR1 (\regs))
503 REST_SP (%sr1, PT_SR1 (\regs))
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65-iot2050-common-pg1.dtsi | 46 compatible = "ti,am654-sr1-icssg-prueth";
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| /linux/drivers/mtd/spi-nor/ |
| H A D | core.c | 829 static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_sr1_and_check() argument
833 nor->bouncebuf[0] = sr1; in spi_nor_write_sr1_and_check()
843 if (nor->bouncebuf[0] != sr1) { in spi_nor_write_sr1_and_check()
861 static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_16bit_sr_and_check() argument
894 sr_cr[0] = sr1; in spi_nor_write_16bit_sr_and_check()
904 if (sr1 != sr_cr[0]) { in spi_nor_write_16bit_sr_and_check()
988 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_sr_and_check() argument
991 return spi_nor_write_16bit_sr_and_check(nor, sr1); in spi_nor_write_sr_and_check()
993 return spi_nor_write_sr1_and_check(nor, sr1); in spi_nor_write_sr_and_check()
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| /linux/kernel/locking/ |
| H A D | lockdep_proc.c | 202 sr1 = debug_atomic_read(redundant_softirqs_on), in lockdep_stats_debug_show() local
226 seq_printf(m, " redundant softirq ons: %11llu\n", sr1); in lockdep_stats_debug_show()
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap34xx-omap36xx-clocks.dtsi | 169 sr1_fck: clock-sr1-fck@6 {
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| /linux/arch/parisc/lib/ |
| H A D | lusercopy.S | 97 srcspc = sr1
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| /linux/drivers/tty/serial/ |
| H A D | fsl_lpuart.c | 842 u8 sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty() local
848 if (sr1 & UARTSR1_TC && sfifo & UARTSFIFO_TXEMPT) in lpuart_tx_empty()
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