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Searched refs:spm_parents (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c229 static const char * const spm_parents[] = { variable
574 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM, "top_spm", spm_parents,
H A Dclk-mt8183.c376 static const char * const spm_parents[] = { variable
530 spm_parents, 0xb0, 0xb4, 0xb8, 24, 1, 31, 0x008, 0,
H A Dclk-mt8188-topckgen.c116 static const char * const spm_parents[] = { variable
960 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM, "top_spm", spm_parents,
H A Dclk-mt8365.c264 static const char * const spm_parents[] = { variable
483 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM_SEL, "spm_sel", spm_parents,
H A Dclk-mt8192.c110 static const char * const spm_parents[] = { variable
551 spm_parents, 0x010, 0x014, 0x018, 8, 2, 15, 0x004, 1,
H A Dclk-mt8195-topckgen.c132 static const char * const spm_parents[] = { variable
878 spm_parents, 0x020, 0x024, 0x028, 8, 2, 15, 0x04, 1,
H A Dclk-mt6765.c311 static const char * const spm_parents[] = { variable
443 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPM_SEL, "spm_sel", spm_parents, CLK_CFG_5,