Searched refs:speed_grade (Results 1 – 7 of 7) sorted by relevance
509 unsigned int tech, family, speed_grade, reg_value; in axi_clkgen_setup_limits() local514 speed_grade = ADI_AXI_INFO_FPGA_SPEED_GRADE(reg_value); in axi_clkgen_setup_limits()519 switch (speed_grade) { in axi_clkgen_setup_limits()542 speed_grade); in axi_clkgen_setup_limits()
142 unsigned int speed_grade; member940 max = clk_wzrd_max_freq[clk_wzrd->speed_grade - 1]; in clk_wzrd_clk_notifier()1186 ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade); in clk_wzrd_probe()1188 if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) { in clk_wzrd_probe()1190 clk_wzrd->speed_grade); in clk_wzrd_probe()1191 clk_wzrd->speed_grade = 0; in clk_wzrd_probe()1212 if (clk_wzrd->speed_grade) { in clk_wzrd_probe()
1017 static const int speed_grade[] = { 250, 200, 166, 175 }; in genwqe_base_clock_frequency() local1020 if (speed >= ARRAY_SIZE(speed_grade)) in genwqe_base_clock_frequency()1023 return speed_grade[speed]; in genwqe_base_clock_frequency()
22 nvmem-cell-names = "speed_grade";
48 nvmem-cell-names = "speed_grade";
53 nvmem-cell-names = "speed_grade";
121 nvmem-cell-names = "speed_grade";