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Searched refs:soc_data (Results 1 – 25 of 50) sorted by relevance

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/linux/drivers/clk/ultrarisc/
H A Dclk-ultrarisc.c210 const struct ultrarisc_clk_soc_data *soc_data) in ultrarisc_clk_register_fixed_factors() argument
214 for (i = 0; i < soc_data->num_fixed_factors; i++) { in ultrarisc_clk_register_fixed_factors()
219 desc = &soc_data->fixed_factors[i]; in ultrarisc_clk_register_fixed_factors()
242 const struct ultrarisc_clk_soc_data *soc_data, in ultrarisc_clk_register_plls() argument
248 for (i = 0; i < soc_data->num_plls; i++) { in ultrarisc_clk_register_plls()
249 const struct ultrarisc_pll_desc *desc = &soc_data->plls[i]; in ultrarisc_clk_register_plls()
258 hw = ultrarisc_clk_register_pll(dev, desc, soc_data->pll_layout, base); in ultrarisc_clk_register_plls()
270 const struct ultrarisc_clk_soc_data *soc_data, in ultrarisc_clk_register_dividers() argument
277 for (i = 0; i < soc_data->num_dividers; i++) { in ultrarisc_clk_register_dividers()
282 desc = &soc_data->dividers[i]; in ultrarisc_clk_register_dividers()
[all …]
/linux/sound/soc/tegra/
H A Dtegra210_adx.c54 adx->soc_data->byte_mask_size * sizeof(*adx->byte_mask)); in tegra210_adx_write_map_ram()
57 adx->soc_data->cya_offset, in tegra210_adx_write_map_ram()
62 for (i = 0; i < adx->soc_data->ram_depth; i++) { in tegra210_adx_write_map_ram()
78 adx->soc_data->cya_offset, word); in tegra210_adx_write_map_ram()
81 for (i = 0; i < adx->soc_data->byte_mask_size; i++) in tegra210_adx_write_map_ram()
155 if (channels < 1 || channels > adx->soc_data->max_ch) { in tegra210_adx_set_audio_cif()
157 channels, adx->soc_data->max_ch); in tegra210_adx_set_audio_cif()
182 if (adx->soc_data->max_ch == 32) in tegra210_adx_set_audio_cif()
500 if (adx->soc_data->num_controls) in tegra210_adx_component_probe()
501 return snd_soc_add_component_controls(component, adx->soc_data->controls, in tegra210_adx_component_probe()
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H A Dtegra210_i2s.c55 regmap_write(i2s->regmap, TEGRA210_I2S_SLOT_CTRL + i2s->soc_data->i2s_ctrl_offset, in tegra210_i2s_set_slot_ctrl()
57 regmap_write(i2s->regmap, TEGRA210_I2S_TX_SLOT_CTRL + i2s->soc_data->tx_offset, in tegra210_i2s_set_slot_ctrl()
69 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL + i2s->soc_data->i2s_ctrl_offset, &val); in tegra210_i2s_set_clock_rate()
116 reset_reg = TEGRA210_I2S_TX_SOFT_RESET + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()
117 cif_reg = TEGRA210_I2S_TX_CIF_CTRL + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()
118 stream_reg = TEGRA210_I2S_TX_CTRL + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()
124 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL + i2s->soc_data->i2s_ctrl_offset, &i2s_ctrl); in tegra210_i2s_sw_reset()
141 regmap_write(i2s->regmap, TEGRA210_I2S_CTRL + i2s->soc_data->i2s_ctrl_offset, i2s_ctrl); in tegra210_i2s_sw_reset()
159 } else if (w->reg == (TEGRA210_I2S_TX_ENABLE + i2s->soc_data->tx_offset)) { in tegra210_i2s_init()
161 status_reg = TEGRA210_I2S_TX_STATUS + i2s->soc_data->tx_offset; in tegra210_i2s_init()
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H A Dtegra210_admaif.c25 #define CH_TX_REG(reg, id) CH_REG(admaif->soc_data->tx_base, reg, id)
27 #define CH_RX_REG(reg, id) CH_REG(admaif->soc_data->rx_base, reg, id)
191 unsigned int num_ch = admaif->soc_data->num_ch; in tegra_admaif_wr_reg()
192 unsigned int rx_base = admaif->soc_data->rx_base; in tegra_admaif_wr_reg()
193 unsigned int tx_base = admaif->soc_data->tx_base; in tegra_admaif_wr_reg()
194 unsigned int global_base = admaif->soc_data->global_base; in tegra_admaif_wr_reg()
195 unsigned int reg_max = admaif->soc_data->regmap_conf->max_register; in tegra_admaif_wr_reg()
225 unsigned int num_ch = admaif->soc_data->num_ch; in tegra_admaif_rd_reg()
226 unsigned int rx_base = admaif->soc_data->rx_base; in tegra_admaif_rd_reg()
227 unsigned int tx_base = admaif->soc_data->tx_base; in tegra_admaif_rd_reg()
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H A Dtegra210_amx.c67 amx->soc_data->byte_mask_size * sizeof(*amx->byte_mask)); in tegra210_amx_write_map_ram()
69 regmap_write(amx->regmap, TEGRA210_AMX_CFG_RAM_CTRL + amx->soc_data->reg_offset, in tegra210_amx_write_map_ram()
74 for (i = 0; i < amx->soc_data->ram_depth; i++) { in tegra210_amx_write_map_ram()
89 regmap_write(amx->regmap, TEGRA210_AMX_CFG_RAM_DATA + amx->soc_data->reg_offset, in tegra210_amx_write_map_ram()
93 for (i = 0; i < amx->soc_data->byte_mask_size; i++) in tegra210_amx_write_map_ram()
195 if (amx->soc_data->max_ch == TEGRA264_AMX_MAX_CHANNEL) in tegra210_amx_set_audio_cif()
209 if (amx->soc_data->auto_disable) { in tegra210_amx_in_hw_params()
212 amx->soc_data->reg_offset), in tegra210_amx_in_hw_params()
214 regmap_write(amx->regmap, TEGRA210_AMX_CYA + amx->soc_data->reg_offset, 1); in tegra210_amx_in_hw_params()
508 if (amx->soc_data->num_controls) in tegra210_amx_component_probe()
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H A Dtegra_isomgr_bw.c100 adma_isomgr->max_pcm_device = admaif->soc_data->num_ch; in tegra_isomgr_adma_register()
102 admaif->soc_data->max_stream_ch * adma_isomgr->max_pcm_device; in tegra_isomgr_adma_register()
/linux/drivers/nvmem/
H A Dqfprom.c79 const struct qfprom_soc_data *soc_data; member
187 int qfprom_blow_uV = priv->soc_data->qfprom_blow_uV; in qfprom_enable_fuse_blowing()
196 ret = clk_set_rate(priv->secclk, priv->soc_data->qfprom_blow_set_freq); in qfprom_enable_fuse_blowing()
228 writel(priv->soc_data->qfprom_blow_timer_value, in qfprom_enable_fuse_blowing()
230 writel(priv->soc_data->accel_value, in qfprom_enable_fuse_blowing()
382 const struct qfprom_soc_compatible_data *soc_data; in qfprom_probe() local
400 soc_data = device_get_match_data(dev); in qfprom_probe()
401 if (soc_data) { in qfprom_probe()
402 econfig.keepout = soc_data->keepout; in qfprom_probe()
403 econfig.nkeepout = soc_data->nkeepout; in qfprom_probe()
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/linux/arch/arm/mach-imx/
H A Dpm-imx5.c324 static int __init imx5_suspend_init(const struct imx5_pm_data *soc_data) in imx5_suspend_init() argument
329 void (*suspend_asm)(void __iomem *) = soc_data->suspend_asm; in imx5_suspend_init()
334 if (!soc_data->suspend_asm_sz || !*soc_data->suspend_asm_sz) in imx5_suspend_init()
338 *soc_data->suspend_asm_sz + sizeof(*suspend_info), in imx5_suspend_init()
345 suspend_info->io_count = soc_data->suspend_io_count; in imx5_suspend_init()
346 memcpy(suspend_info->io_state, soc_data->suspend_io_config, in imx5_suspend_init()
347 sizeof(*suspend_info->io_state) * soc_data->suspend_io_count); in imx5_suspend_init()
349 suspend_info->m4if_base = ioremap(soc_data->m4if_addr, SZ_16K); in imx5_suspend_init()
355 suspend_info->iomuxc_base = ioremap(soc_data->iomuxc_addr, SZ_16K); in imx5_suspend_init()
364 *soc_data->suspend_asm_sz); in imx5_suspend_init()
/linux/drivers/iio/adc/
H A Dingenic-adc.c111 const struct ingenic_adc_soc_data *soc_data; member
245 if (!adc->soc_data->battery_vref_mode) in ingenic_adc_write_raw()
612 *length = adc->soc_data->battery_raw_avail_size; in ingenic_adc_read_avail()
613 *vals = adc->soc_data->battery_raw_avail; in ingenic_adc_read_avail()
617 *length = adc->soc_data->battery_scale_avail_size; in ingenic_adc_read_avail()
618 *vals = adc->soc_data->battery_scale_avail; in ingenic_adc_read_avail()
631 if (adc->soc_data->has_aux_md && engine == 0) { in __ingenic_adc_read_chan()
711 *val = adc->soc_data->battery_high_vref; in ingenic_adc_read_raw()
712 *val2 = adc->soc_data->battery_high_vref_bits; in ingenic_adc_read_raw()
826 const struct ingenic_adc_soc_data *soc_data; in ingenic_adc_probe() local
[all …]
/linux/sound/soc/fsl/
H A Dfsl_sai.c136 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_isr()
270 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_set_dai_sysclk_tr()
355 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_set_dai_fmt_tr()
498 unsigned int reg, ofs = sai->soc_data->reg_offset; in fsl_sai_set_bclk()
515 id = sai->soc_data->mclk0_is_mclk1 ? 1 : 0; in fsl_sai_set_bclk()
609 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_hw_params()
753 watermark = tx ? (sai->soc_data->fifo_depth - dma_params->maxburst) : in fsl_sai_hw_params()
756 FSL_SAI_CR1_RFW_MASK(sai->soc_data->fifo_depth), in fsl_sai_hw_params()
761 for (i = 0; i < sai->soc_data->pins; i++) { in fsl_sai_hw_params()
780 if (sai->soc_data->mclk_with_tere && sai->mclk_direction_output && in fsl_sai_hw_params()
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H A Dfsl_xcvr.c38 const struct fsl_xcvr_soc_data *soc_data; member
408 if (!xcvr->soc_data->use_phy) in fsl_xcvr_en_phy_pll()
431 switch (xcvr->soc_data->pll_ver) { in fsl_xcvr_en_phy_pll()
485 dev_err(dev, "Error for PLL version %d\n", xcvr->soc_data->pll_ver); in fsl_xcvr_en_phy_pll()
520 freq = xcvr->soc_data->spdif_only ? freq / 5 : freq; in fsl_xcvr_en_aud_pll()
535 if (!xcvr->soc_data->use_phy) in fsl_xcvr_en_aud_pll()
578 if (xcvr->soc_data->spdif_only && tx) { in fsl_xcvr_prepare()
707 if (xcvr->soc_data->use_edma) in fsl_xcvr_startup()
716 if (xcvr->soc_data->spdif_only && tx) in fsl_xcvr_startup()
733 if (!xcvr->soc_data in fsl_xcvr_startup()
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H A Dfsl_rpmsg.c213 rpmsg->soc_data = of_device_get_match_data(&pdev->dev); in fsl_rpmsg_probe()
215 if (rpmsg->soc_data) { in fsl_rpmsg_probe()
216 dai_drv->playback.rates = rpmsg->soc_data->rates; in fsl_rpmsg_probe()
217 dai_drv->capture.rates = rpmsg->soc_data->rates; in fsl_rpmsg_probe()
218 dai_drv->playback.formats = rpmsg->soc_data->formats; in fsl_rpmsg_probe()
219 dai_drv->capture.formats = rpmsg->soc_data->formats; in fsl_rpmsg_probe()
H A Dfsl_rpmsg.h41 const struct fsl_rpmsg_soc_data *soc_data; member
/linux/drivers/dma/
H A Ddma-jz4780.c154 const struct jz4780_dma_soc_data *soc_data; member
210 if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) { in jz4780_dma_chan_enable()
213 if (jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC) in jz4780_dma_chan_enable()
225 if ((jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) && in jz4780_dma_chan_disable()
226 !(jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC)) in jz4780_dma_chan_disable()
286 else if (ord > jzdma->soc_data->transfer_ord_max) in jz4780_dma_transfer_size()
287 ord = jzdma->soc_data->transfer_ord_max; in jz4780_dma_transfer_size()
389 !(jzdma->soc_data->flags & JZ_SOC_DATA_BREAK_LINKS)) { in jz4780_dma_prep_slave_sg()
679 const unsigned int soc_flags = jzdma->soc_data->flags; in jz4780_dma_chan_irq()
736 unsigned int nb_channels = jzdma->soc_data->nb_channels; in jz4780_dma_irq_handler()
[all …]
/linux/drivers/thermal/
H A Dimx_thermal.c222 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_panic_temp() local
228 regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, in imx_set_panic_temp()
229 soc_data->panic_alarm_mask); in imx_set_panic_temp()
230 regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, in imx_set_panic_temp()
231 critical_value << soc_data->panic_alarm_shift); in imx_set_panic_temp()
238 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_alarm_temp() local
248 regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, in imx_set_alarm_temp()
249 soc_data->high_alarm_mask); in imx_set_alarm_temp()
250 regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, in imx_set_alarm_temp()
251 alarm_value << soc_data->high_alarm_shift); in imx_set_alarm_temp()
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H A Dairoha_thermal.c667 const struct airoha_thermal_soc_data *soc_data; in airoha_thermal_probe() local
672 soc_data = device_get_match_data(dev); in airoha_thermal_probe()
678 priv->pllrg_protect = soc_data->pllrg_protect; in airoha_thermal_probe()
681 if (!soc_data->probe) in airoha_thermal_probe()
684 ret = soc_data->probe(pdev, priv); in airoha_thermal_probe()
690 soc_data->thdev_ops); in airoha_thermal_probe()
698 return soc_data->post_probe ? soc_data->post_probe(pdev) : 0; in airoha_thermal_probe()
/linux/drivers/pinctrl/nxp/
H A Dpinctrl-s32cc.c122 unsigned int mem_regions = ipctl->info->soc_data->mem_regions; in s32_get_region()
716 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_suspend()
717 pin = &info->soc_data->pins[i]; in s32_pinctrl_suspend()
741 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_resume()
742 pin = &info->soc_data->pins[i]; in s32_pinctrl_resume()
854 unsigned int mem_regions = info->soc_data->mem_regions; in s32_pinctrl_probe_dt()
892 ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i]; in s32_pinctrl_probe_dt()
926 const struct s32_pinctrl_soc_data *soc_data) in s32_pinctrl_probe() argument
936 if (!soc_data || !soc_data->pins || !soc_data->npins) in s32_pinctrl_probe()
944 info->soc_data = soc_data; in s32_pinctrl_probe()
[all …]
H A Dpinctrl-s32.h46 const struct s32_pinctrl_soc_data *soc_data; member
58 const struct s32_pinctrl_soc_data *soc_data);
/linux/drivers/soc/rockchip/
H A Dio-domain.c81 const struct rockchip_iodomain_soc_data *soc_data; member
141 ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); in rockchip_iodomain_write()
630 iod->soc_data = match->data; in rockchip_iodomain_probe()
632 if (iod->soc_data->write) in rockchip_iodomain_probe()
633 iod->write = iod->soc_data->write; in rockchip_iodomain_probe()
651 const char *supply_name = iod->soc_data->supply_names[i]; in rockchip_iodomain_probe()
713 if (iod->soc_data->init) in rockchip_iodomain_probe()
714 iod->soc_data->init(iod); in rockchip_iodomain_probe()
/linux/drivers/clk/aspeed/
H A Dclk-aspeed.c386 const struct aspeed_clk_soc_data *soc_data; in aspeed_clk_probe() local
417 soc_data = of_device_get_match_data(dev); in aspeed_clk_probe()
418 if (!soc_data) { in aspeed_clk_probe()
440 hw = soc_data->calc_pll("mpll", val); in aspeed_clk_probe()
453 soc_data->div_table, in aspeed_clk_probe()
462 soc_data->mac_div_table, in aspeed_clk_probe()
495 soc_data->div_table, in aspeed_clk_probe()
504 soc_data->div_table, in aspeed_clk_probe()
527 3, 0, soc_data->eclk_div_table, in aspeed_clk_probe()
/linux/drivers/phy/cadence/
H A Dcdns-dphy-rx.c173 const struct cdns_dphy_soc_data *soc_data = NULL; in cdns_dphy_rx_configure() local
179 soc_data = soc->data; in cdns_dphy_rx_configure()
180 if (!soc || (soc_data && !soc_data->has_hw_cmn_rstb)) { in cdns_dphy_rx_configure()
/linux/sound/soc/rockchip/
H A Drockchip_i2s_tdm.c60 const struct rk_i2s_soc_data *soc_data; member
574 val <<= i2s_tdm->soc_data->grf_shift; in rockchip_i2s_io_multiplex()
575 val |= (I2S_IO_DIRECTION_MASK << i2s_tdm->soc_data->grf_shift) << 16; in rockchip_i2s_io_multiplex()
576 regmap_write(i2s_tdm->grf, i2s_tdm->soc_data->grf_reg_offset, val); in rockchip_i2s_io_multiplex()
938 const struct txrx_config *configs = i2s_tdm->soc_data->configs;
951 for (i = 0; i < i2s_tdm->soc_data->config_count; i++) { in common_soc_init()
1244 i2s_tdm->soc_data = device_get_match_data(&pdev->dev); in rockchip_i2s_tdm_probe()
1358 if (i2s_tdm->soc_data && i2s_tdm->soc_data->init) in rockchip_i2s_tdm_probe()
1359 i2s_tdm->soc_data in rockchip_i2s_tdm_probe()
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/linux/drivers/pmdomain/mediatek/
H A Dmtk-pm-domains.c80 const struct scpsys_soc_data *soc_data; member
865 switch (scpsys->soc_data->type) { in scpsys_add_one_domain()
867 if (id >= scpsys->soc_data->num_domains) { in scpsys_add_one_domain()
872 domain_data = &scpsys->soc_data->domains_data[id]; in scpsys_add_one_domain()
882 if (id >= scpsys->soc_data->num_hwv_domains) { in scpsys_add_one_domain()
888 hwv_domain_data = &scpsys->soc_data->hwv_domains_data[id]; in scpsys_add_one_domain()
974 if (scpsys->soc_data->type == SCPSYS_MTCMOS_TYPE_DIRECT_CTL) { in scpsys_add_one_domain()
994 if (scpsys->soc_data->type == SCPSYS_MTCMOS_TYPE_HW_VOTER) in scpsys_add_one_domain()
1103 if (scpsys->soc_data->type == SCPSYS_MTCMOS_TYPE_HW_VOTER) { in scpsys_remove_one_domain()
1241 const struct scpsys_soc_data *soc = scpsys->soc_data; in scpsys_get_bus_protection()
[all …]
/linux/drivers/clk/
H A Dclk-en7523.c606 const struct en_clk_soc_data *soc_data = device_get_match_data(dev); in en7523_register_pcie_clk() local
609 .ops = &soc_data->pcie_ops, in en7523_register_pcie_clk()
986 const struct en_clk_soc_data *soc_data; in en7523_clk_probe() local
990 soc_data = device_get_match_data(&pdev->dev); in en7523_clk_probe()
993 struct_size(clk_data, hws, soc_data->num_clocks), in en7523_clk_probe()
998 clk_data->num = soc_data->num_clocks; in en7523_clk_probe()
999 r = soc_data->hw_init(pdev, clk_data); in en7523_clk_probe()
/linux/drivers/dma/ti/
H A Dk3-udma-private.c171 const struct udma_oes_offsets *oes = &ud->soc_data->oes; in xudma_pktdma_tflow_get_irq()
179 const struct udma_oes_offsets *oes = &ud->soc_data->oes; in xudma_pktdma_rflow_get_irq()

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