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Searched refs:smep (Results 1 – 6 of 6) sorted by relevance

/linux/lib/zstd/common/
H A Dcpu.h166 B(smep, 7)
/linux/Documentation/admin-guide/hw-vuln/
H A Drsb.rst99 Protection"." [#amd-smep-rsb]_
107 IA32_SPEC_CTRL.IBRS set during VM exits." [#intel-smep-rsb]_
240 .. [#amd-smep-rsb] "Existing Mitigations" in `Technical Guidance for Mitigating Branch Type Confusi…
242 .. [#intel-smep-rsb] "Enhanced IBRS" in `Indirect Branch Restricted Speculation <https://www.intel.…
/linux/Documentation/virt/kvm/x86/
H A Dmmu.rst188 Contains the value of cr4.smep && !cr0.wp for which the page is valid
438 exists when an spte created with cr0.wp=0 and cr4.smep=0 is used after
439 changing cr4.smep to 1. To avoid this, the value of !cr0.wp && cr4.smep
/linux/arch/x86/kvm/svm/
H A Dsvm.c4811 bool smep, smap, is_user; in svm_check_emulate_instruction() local
4919 smep = kvm_is_cr4_bit_set(vcpu, X86_CR4_SMEP); in svm_check_emulate_instruction()
4922 if (smap && (!smep || is_user)) { in svm_check_emulate_instruction()
/linux/arch/x86/kvm/mmu/
H A Dmmu.c210 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
230 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv196 0x7, 0, ebx, 7, smep , Supervisor Mode Execution Protection