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Searched refs:slice_chunk_size (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Drc_calc_dpi.c66 to->slice_chunk_size = from->slice_chunk_size; in copy_pps_fields()
115 (uint32_t)(div_u64(((uint64_t)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1)), in dscc_compute_dsc_parameters()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc_regs.h186 #define DSC_PPS16_SLICE_CHUNK_SIZE(slice_chunk_size) REG_FIELD_PREP(DSC_PPS16_SLICE_CHUNK_SIZE_M… argument
187 slice_chunk_size)
H A Dintel_vdsc.c613 pps_val = DSC_PPS16_SLICE_CHUNK_SIZE(vdsc_cfg->slice_chunk_size) | in intel_dsc_pps_configure()
1056 vdsc_cfg->slice_chunk_size = REG_FIELD_GET(DSC_PPS16_SLICE_CHUNK_SIZE_MASK, pps_temp); in intel_dsc_get_pps_config()
H A Dintel_display.c5468 PIPE_CONF_CHECK_I(dsc.config.slice_chunk_size); in intel_pipe_config_compare()
/linux/include/drm/display/
H A Ddrm_dsc.h233 u16 slice_chunk_size; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c307 DC_LOG_DSC("\tslice_chunk_size %d", pps->slice_chunk_size); in dsc_log_pps()
544 reg_vals->pps.slice_chunk_size = 0; in dsc_init_reg_values()
649 CHUNK_SIZE, reg_vals->pps.slice_chunk_size); in dsc_write_to_registers()
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c940 total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; in dsi_update_dsc_timing()
941 bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ in dsi_update_dsc_timing()
978 reg_ctrl2 |= DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH(dsc->slice_chunk_size); in dsi_update_dsc_timing()
1112 wc = msm_host->dsc->slice_chunk_size + 1; in dsi_timing_setup()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c268 CHUNK_SIZE, reg_vals->pps.slice_chunk_size); in dsc_write_to_registers()