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Searched refs:skl (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dskl_watermark.c323 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
345 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
368 &crtc_state->wm.skl.optimal.planes[plane_id]; in tgl_crtc_can_enable_sagv()
582 crtc_state->wm.skl.ddb.start = mbus_offset + new_dbuf_state->ddb[pipe].start; in skl_crtc_allocate_ddb()
583 crtc_state->wm.skl.ddb.end = mbus_offset + new_dbuf_state->ddb[pipe].end; in skl_crtc_allocate_ddb()
1438 memset(crtc_state->wm.skl.plane_ddb, 0, sizeof(crtc_state->wm.skl.plane_ddb)); in skl_crtc_allocate_plane_ddb()
1439 memset(crtc_state->wm.skl.plane_ddb_y, 0, sizeof(crtc_state->wm.skl.plane_ddb_y)); in skl_crtc_allocate_plane_ddb()
1440 memset(crtc_state->wm.skl.plane_min_ddb, 0, in skl_crtc_allocate_plane_ddb()
1441 sizeof(crtc_state->wm.skl.plane_min_ddb)); in skl_crtc_allocate_plane_ddb()
1442 memset(crtc_state->wm.skl.plane_interim_ddb, 0, in skl_crtc_allocate_plane_ddb()
[all …]
H A Dintel_dbuf_bw.c138 &crtc_state->wm.skl.plane_ddb[plane_id], in skl_crtc_calc_dbuf_bw()
143 &crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_crtc_calc_dbuf_bw()
H A Dintel_plane.c490 * And let's do this for all skl+ so that we can eg. change the in intel_plane_do_async_flip()
669 * flip (see {i9xx,skl}_plane_update_arm()). The in intel_plane_atomic_calc_changes()
836 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb[plane_id], in skl_next_plane_to_commit()
838 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
843 ddb[plane_id] = crtc_state->wm.skl.plane_ddb[plane_id]; in skl_next_plane_to_commit()
844 ddb_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_next_plane_to_commit()
925 * the order does not matter even for skl+. in intel_crtc_planes_update_noarm()
953 memcpy(ddb, old_crtc_state->wm.skl.plane_ddb, in skl_crtc_planes_update_arm()
954 sizeof(old_crtc_state->wm.skl.plane_ddb)); in skl_crtc_planes_update_arm()
955 memcpy(ddb_y, old_crtc_state->wm.skl in skl_crtc_planes_update_arm()
[all...]
H A Dintel_display.c7029 entries[pipe] = old_crtc_state->wm.skl.ddb; in skl_commit_modeset_enables()
7068 if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, in skl_commit_modeset_enables()
7072 entries[pipe] = new_crtc_state->wm.skl.ddb; in skl_commit_modeset_enables()
7083 if (!skl_ddb_entry_equal(&new_crtc_state->wm.skl.ddb, in skl_commit_modeset_enables()
7084 &old_crtc_state->wm.skl.ddb) && in skl_commit_modeset_enables()
7157 skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, in skl_commit_modeset_enables()
7160 entries[pipe] = new_crtc_state->wm.skl.ddb; in skl_commit_modeset_enables()
H A Dintel_display_types.h943 } skl; member
H A Dintel_dmc.c180 #define SKL_DMC_PATH DMC_LEGACY_PATH(skl, 1, 27)
/linux/sound/soc/intel/avs/
H A DMakefile7 snd-soc-avs-y += skl.o apl.o cnl.o icl.o tgl.o mtl.o lnl.o ptl.o
/linux/sound/soc/intel/common/
H A DMakefile4 soc-acpi-intel-skl-match.o soc-acpi-intel-kbl-match.o \
/linux/drivers/platform/x86/intel/int3472/
H A DKconfig31 The module will be named "intel-skl-int3472".