Searched refs:size_mask (Results 1 – 14 of 14) sorted by relevance
335 #define size_mask(x) ((1U<<(x))-1) macro343 #define dde_count_mask size_mask(8)348 #define csb_v_mask size_mask(1)350 #define csb_f_mask size_mask(1)352 #define csb_cs_mask size_mask(8)354 #define csb_cc_mask size_mask(8)356 #define csb_ce_mask size_mask(8)361 #define ccb_cm_mask size_mask(3)366 #define vas_buf_num_mask size_mask(6)368 #define send_wc_id_mask size_mask(16)[all …]
107 return (ring->head - ring->tail - 1) & ring->size_mask; in fbnic_desc_unused()112 return (ring->tail - ring->head) & ring->size_mask; in fbnic_desc_used()327 tail &= ring->size_mask; in fbnic_tx_map()353 tail &= ring->size_mask; in fbnic_tx_map()370 FBNIC_XMIT_CB(skb)->desc_count = ((twd - meta) + 1) & ring->size_mask; in fbnic_tx_map()396 tail &= ring->size_mask; in fbnic_tx_map()553 clean_desc = (hw_head - head) & ring->size_mask; in fbnic_clean_twq0()576 head &= ring->size_mask; in fbnic_clean_twq0()582 head &= ring->size_mask; in fbnic_clean_twq0()592 head &= ring->size_mask; in fbnic_clean_twq0()[all …]
121 u16 size_mask; /* Size of ring in descriptors - 1 */ member
256 ring->size_mask = size - 1; in mlx4_en_create_rx_ring()366 ring->size_mask = ring->actual_size - 1; in mlx4_en_activate_rx_rings()528 ring->prod & ring->size_mask, in mlx4_en_refill_rx_buffers()711 index = cq->mcq.cons_index & ring->size_mask; in mlx4_en_process_rx_cq()933 index = (cq->mcq.cons_index) & ring->size_mask; in mlx4_en_process_rx_cq()
53 u16 size_mask; member
150 u16 size_mask; member
56 f->size_mask = memsz - 1; in tn40_fifo_alloc()829 f->m.rptr &= f->m.size_mask; in tn40_tx_cleanup()
173 f->size_mask = memsz - 1; in bdx_fifo_init()1708 f->m.rptr &= f->m.size_mask; in bdx_tx_cleanup()
1291 size_t size_cpus, size_mask; in cpu_map_data__alloc() local1308 size_mask = sizeof(u16) + sizeof(struct perf_record_mask_cpu_map32) + in cpu_map_data__alloc()1310 if (syn_data->has_any_cpu || size_cpus < size_mask) { in cpu_map_data__alloc()1318 syn_data->size = header_size + PERF_ALIGN(size_mask, sizeof(u64)); in cpu_map_data__alloc()
156 idx &= htt->rx_ring.size_mask; in __ath10k_htt_rx_ring_fill_n()201 idx &= htt->rx_ring.size_mask; in __ath10k_htt_rx_ring_fill_n()340 idx &= htt->rx_ring.size_mask; in ath10k_htt_rx_netbuf_pop()801 htt->rx_ring.size_mask = htt->rx_ring.size - 1; in ath10k_htt_rx_alloc()831 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; in ath10k_htt_rx_alloc()
1833 unsigned int size_mask; member
849 if (region->size & erase[i].size_mask) { in spi_nor_region_check_overlay()
1487 *remainder = (u32)dividend & erase->size_mask; in spi_nor_div_by_erase_size()2487 erase->size_mask = (1 << erase->size_shift) - 1; in spi_nor_set_erase_type()
1942 static int atomic_size_to_mode(int size_mask) in atomic_size_to_mode() argument1947 int supported_size_mask = size_mask & 0x1ff; in atomic_size_to_mode()