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Searched refs:simd (Results 1 – 16 of 16) sorted by relevance

/linux/crypto/
H A Dsimd.c215 struct simd_skcipher_alg *simd; in simd_register_skciphers_compat() local
227 simd = simd_skcipher_create_compat(algs + i, algname, drvname, basename); in simd_register_skciphers_compat()
228 err = PTR_ERR(simd); in simd_register_skciphers_compat()
229 if (IS_ERR(simd)) in simd_register_skciphers_compat()
231 simd_algs[i] = simd; in simd_register_skciphers_compat()
438 struct simd_aead_alg *simd; in simd_register_aeads_compat() local
450 simd = simd_aead_create_compat(algs + i, algname, drvname, basename); in simd_register_aeads_compat()
451 err = PTR_ERR(simd); in simd_register_aeads_compat()
452 if (IS_ERR(simd)) in simd_register_aeads_compat()
454 simd_algs[i] = simd; in simd_register_aeads_compat()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_2.c422 uint32_t se, cu, simd, wave; in gfx_v9_4_2_log_wave_assignment() local
437 for (simd = 0; simd < SIMD_ID_MAX; simd++) { in gfx_v9_4_2_log_wave_assignment()
456 uint32_t se, cu, simd, wave; in gfx_v9_4_2_wait_for_waves_assigned() local
467 for (simd = 0; simd < SIMD_ID_MAX; simd++) in gfx_v9_4_2_wait_for_waves_assigned()
1804 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
1808 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
1818 uint32_t i, simd, wave; in gfx_v9_4_2_log_cu_timeout_status() local
1829 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status()
1832 wave_status = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_4_2_log_cu_timeout_status()
1833 wave_pc_lo = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_4_2_log_cu_timeout_status()
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H A Dgfx_v6_0.c2949 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
2953 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
2959 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
2965 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
2974 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v6_0_read_wave_data() argument
2978 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data()
2979 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data()
2980 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
2981 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
2982 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data()
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H A Dgfx_v7_0.c4055 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
4059 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
4065 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
4071 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
4080 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v7_0_read_wave_data() argument
4084 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data()
4085 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data()
4086 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
4087 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
4088 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data()
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H A Damdgpu_debugfs.c434 adev->gfx.funcs->read_wave_data(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, data, &x); in amdgpu_debugfs_gprwave_read()
439 …adev->gfx.funcs->read_wave_vgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, rd->id.gpr.thread,… in amdgpu_debugfs_gprwave_read()
442 …adev->gfx.funcs->read_wave_sgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, *pos, size>>2, dat… in amdgpu_debugfs_gprwave_read()
1061 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local
1072 simd = (*pos & GENMASK_ULL(44, 37)) >> 37; in amdgpu_debugfs_wave_read()
1092 adev->gfx.funcs->read_wave_data(adev, 0, simd, wave, data, &x); in amdgpu_debugfs_wave_read()
1153 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local
1164 simd = (*pos & GENMASK_ULL(51, 44)) >> 44; in amdgpu_debugfs_gpr_read()
1186 adev->gfx.funcs->read_wave_vgprs(adev, 0, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
1189 adev->gfx.funcs->read_wave_sgprs(adev, 0, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
H A Damdgpu_umr.h50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
H A Damdgpu_gfx.h292 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd,
294 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd,
297 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd,
H A Dgfx_v9_4_3.c735 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t … in wave_read_ind() argument
739 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
745 static void wave_read_regs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in wave_read_regs() argument
751 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
761 uint32_t xcc_id, uint32_t simd, uint32_t wave, in gfx_v9_4_3_read_wave_data() argument
766 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_4_3_read_wave_data()
767 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_4_3_read_wave_data()
768 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_3_read_wave_data()
769 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_3_read_wave_data()
770 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_4_3_read_wave_data()
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H A Dgfx_v8_0.c5211 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
5215 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
5221 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
5227 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
5236 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v8_0_read_wave_data() argument
5240 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data()
5241 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data()
5242 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
5243 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
5244 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data()
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H A Dgfx_v9_0.c1928 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
1932 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
1938 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
1944 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
1953 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v9_0_read_wave_data() argument
1957 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data()
1958 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data()
1959 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
1960 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
1961 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data()
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H A Dgfx_v12_0.c804 uint32_t simd, uint32_t wave, in gfx_v12_0_read_wave_data() argument
810 WARN_ON(simd != 0); in gfx_v12_0_read_wave_data()
840 uint32_t xcc_id, uint32_t simd, in gfx_v12_0_read_wave_sgprs() argument
844 WARN_ON(simd != 0); in gfx_v12_0_read_wave_sgprs()
852 uint32_t xcc_id, uint32_t simd, in gfx_v12_0_read_wave_vgprs() argument
H A Dgfx_v11_0.c981 static void gfx_v11_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, ui… in gfx_v11_0_read_wave_data() argument
986 WARN_ON(simd != 0); in gfx_v11_0_read_wave_data()
1007 static void gfx_v11_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v11_0_read_wave_sgprs() argument
1011 WARN_ON(simd != 0); in gfx_v11_0_read_wave_sgprs()
1018 static void gfx_v11_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v11_0_read_wave_vgprs() argument
H A Dgfx_v10_0.c4444 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, ui… in gfx_v10_0_read_wave_data() argument
4450 WARN_ON(simd != 0); in gfx_v10_0_read_wave_data()
4472 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_sgprs() argument
4476 WARN_ON(simd != 0); in gfx_v10_0_read_wave_sgprs()
4483 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_vgprs() argument
/linux/arch/arm/crypto/
H A Daes-neonbs-glue.c473 struct simd_skcipher_alg *simd; in aes_init() local
494 simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename); in aes_init()
495 err = PTR_ERR(simd); in aes_init()
496 if (IS_ERR(simd)) in aes_init()
499 aes_simd_algs[i] = simd; in aes_init()
H A Daes-ce-glue.c696 struct simd_skcipher_alg *simd; in aes_init() local
714 simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename); in aes_init()
715 err = PTR_ERR(simd); in aes_init()
716 if (IS_ERR(simd)) in aes_init()
719 aes_simd_algs[i] = simd; in aes_init()
/linux/include/asm-generic/
H A DKbuild53 mandatory-y += simd.h