Searched refs:sim_data (Results 1 – 3 of 3) sorted by relevance
199 struct nv_sim_state sim_data; in nv04_update_arb() local205 sim_data.pclk_khz = VClk; in nv04_update_arb()206 sim_data.mclk_khz = MClk; in nv04_update_arb()207 sim_data.nvclk_khz = NVClk; in nv04_update_arb()208 sim_data.bpp = bpp; in nv04_update_arb()209 sim_data.two_heads = nv_two_heads(dev); in nv04_update_arb()218 sim_data.memory_type = (type >> 12) & 1; in nv04_update_arb()219 sim_data.memory_width = 64; in nv04_update_arb()220 sim_data.mem_latency = 3; in nv04_update_arb()221 sim_data.mem_page_miss = 10; in nv04_update_arb()[all …]
617 nv3_sim_state sim_data; in nv3UpdateArbitrationSettings() local623 sim_data.pix_bpp = (char)pixelDepth; in nv3UpdateArbitrationSettings()624 sim_data.enable_video = 0; in nv3UpdateArbitrationSettings()625 sim_data.enable_mp = 0; in nv3UpdateArbitrationSettings()626 sim_data.video_scale = 1; in nv3UpdateArbitrationSettings()627 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv3UpdateArbitrationSettings()629 sim_data.memory_width = 128; in nv3UpdateArbitrationSettings()631 sim_data.mem_latency = 9; in nv3UpdateArbitrationSettings()632 sim_data.mem_aligned = 1; in nv3UpdateArbitrationSettings()633 sim_data.mem_page_miss = 11; in nv3UpdateArbitrationSettings()[all …]
386 nv4_sim_state sim_data; in nv4UpdateArbitrationSettings() local392 sim_data.pix_bpp = (char)pixelDepth; in nv4UpdateArbitrationSettings()393 sim_data.enable_video = 0; in nv4UpdateArbitrationSettings()394 sim_data.enable_mp = 0; in nv4UpdateArbitrationSettings()395 sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ? in nv4UpdateArbitrationSettings()397 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()398 sim_data.mem_aligned = 1; in nv4UpdateArbitrationSettings()399 sim_data.mem_page_miss = in nv4UpdateArbitrationSettings()401 sim_data.gr_during_vid = 0; in nv4UpdateArbitrationSettings()402 sim_data.pclk_khz = VClk; in nv4UpdateArbitrationSettings()[all …]