Searched refs:signal_levels (Results 1 – 2 of 2) sorted by relevance
996 u32 signal_levels = 0; in g4x_signal_levels() local1001 signal_levels |= DP_VOLTAGE_0_4; in g4x_signal_levels()1004 signal_levels |= DP_VOLTAGE_0_6; in g4x_signal_levels()1007 signal_levels |= DP_VOLTAGE_0_8; in g4x_signal_levels()1010 signal_levels |= DP_VOLTAGE_1_2; in g4x_signal_levels()1016 signal_levels |= DP_PRE_EMPHASIS_0; in g4x_signal_levels()1019 signal_levels |= DP_PRE_EMPHASIS_3_5; in g4x_signal_levels()1022 signal_levels |= DP_PRE_EMPHASIS_6; in g4x_signal_levels()1025 signal_levels |= DP_PRE_EMPHASIS_9_5; in g4x_signal_levels()1028 return signal_levels; in g4x_signal_levels()[all …]
1433 u8 signal_levels) in translate_signal_level() argument1439 if (index_to_dp_signal_levels[i] == signal_levels) in translate_signal_level()1445 signal_levels); in translate_signal_level()1459 u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK | in intel_ddi_dp_level() local1462 return translate_signal_level(intel_dp, signal_levels); in intel_ddi_dp_level()1498 u32 signal_levels; in hsw_set_signal_levels() local1507 signal_levels = DDI_BUF_TRANS_SELECT(level); in hsw_set_signal_levels()1510 signal_levels); in hsw_set_signal_levels()1513 intel_dp->DP |= signal_levels; in hsw_set_signal_levels()