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Searched refs:shift1 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_helper.c108 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in set_reg_field_values() argument
116 field_value1, mask1, shift1); in set_reg_field_values()
223 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_update_ex() argument
232 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_update_ex()
251 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_set_ex() argument
259 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_set_ex()
286 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get2() argument
290 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get2()
296 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get3() argument
301 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get3()
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H A Ddm_services.h121 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
125 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.c44 uint32_t addr, int n, uint8_t shift1, in set_reg_field_values() argument
53 shift1); in set_reg_field_values()
72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
80 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_update()
90 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_set() argument
96 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_set()
H A Ddmub_reg.h115 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
117 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h395 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
399 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
404 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
410 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
417 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
425 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
434 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
492 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
498 uint8_t shift1, uint32_t mask1, uint32_t field_value1,
527 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
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/linux/drivers/clk/x86/
H A Dclk-cgu.h41 u8 shift1; member
138 u8 shift1; member
160 .shift1 = _shft1, \
H A Dclk-cgu.c401 ddiv->shift1, ddiv->width1) + 1; in lgm_clk_ddiv_recalc_rate()
484 lgm_set_clk_val(ddiv->membase, ddiv->reg, ddiv->shift1, ddiv->width1, in lgm_clk_ddiv_set_rate()
561 ddiv->shift1 = list->shift1; in lgm_clk_register_ddiv()
/linux/drivers/clk/mvebu/
H A Darmada-37xx-periph.c74 u8 shift1; member
152 .shift1 = _shift1, \
343 div = get_div(double_div->reg1, double_div->shift1); in clk_double_div_recalc_rate()
/linux/Documentation/driver-api/
H A Dipmi.rst402 regshifts=<shift1>,<shift2>,...
473 ipmi_si.regshifts=<shift1>,<shift2>,...