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Searched refs:sgm_0_parents (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt7988-topckgen.c91 static const char *const sgm_0_parents[] = { "top_xtal", "sgmpll" }; variable
190 MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_0_SEL, "sgm_0_sel", sgm_0_parents, 0x090, 0x094, 0x098, 8,
194 MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_1_SEL, "sgm_1_sel", sgm_0_parents, 0x090, 0x094, 0x098, 24,