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Searched refs:setting (Results 1 – 25 of 734) sorted by relevance

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/linux/drivers/pinctrl/
H A Dpinconf.c110 struct pinctrl_setting *setting) in pinconf_map_to_setting() argument
112 struct pinctrl_dev *pctldev = setting->pctldev; in pinconf_map_to_setting()
115 switch (setting->type) { in pinconf_map_to_setting()
124 setting->data.configs.group_or_pin = pin; in pinconf_map_to_setting()
134 setting->data.configs.group_or_pin = pin; in pinconf_map_to_setting()
140 setting->data.configs.num_configs = map->data.configs.num_configs; in pinconf_map_to_setting()
141 setting->data.configs.configs = map->data.configs.configs; in pinconf_map_to_setting()
146 void pinconf_free_setting(const struct pinctrl_setting *setting) in pinconf_free_setting() argument
150 int pinconf_apply_setting(const struct pinctrl_setting *setting) in pinconf_apply_setting() argument
152 struct pinctrl_dev *pctldev = setting->pctldev; in pinconf_apply_setting()
[all …]
H A Dpinconf.h28 struct pinctrl_setting *setting);
29 void pinconf_free_setting(const struct pinctrl_setting *setting);
30 int pinconf_apply_setting(const struct pinctrl_setting *setting);
57 struct pinctrl_setting *setting) in pinconf_map_to_setting() argument
62 static inline void pinconf_free_setting(const struct pinctrl_setting *setting) in pinconf_free_setting() argument
66 static inline int pinconf_apply_setting(const struct pinctrl_setting *setting) in pinconf_apply_setting() argument
83 const struct pinctrl_setting *setting);
95 const struct pinctrl_setting *setting) in pinconf_show_setting() argument
H A Dcore.c974 struct pinctrl_setting *setting; in add_setting() local
986 setting = kzalloc(sizeof(*setting), GFP_KERNEL); in add_setting()
987 if (!setting) in add_setting()
990 setting->type = map->type; in add_setting()
993 setting->pctldev = pctldev; in add_setting()
995 setting->pctldev = in add_setting()
997 if (!setting->pctldev) { in add_setting()
998 kfree(setting); in add_setting()
1011 setting->dev_name = map->dev_name; in add_setting()
1015 ret = pinmux_map_to_setting(map, setting); in add_setting()
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H A Dpinctrl-mpfs-iomux0.c36 u32 setting; member
80 .setting = 0x0, \
85 .setting = _mask, \
196 function->name, group->mask, group->setting); in mpfs_iomux0_pinmux_set_mux()
197 regmap_assign_bits(pctrl->regmap, MPFS_IOMUX0_REG, group->mask, group->setting); in mpfs_iomux0_pinmux_set_mux()
H A Dpinctrl-pic64gx-gpio2.c41 u32 setting; member
127 .setting = 0x0, \
133 .setting = _mask, \
286 function->name, group->mask, group->setting); in pic64gx_gpio2_pinmux_set_mux()
287 regmap_assign_bits(pctrl->regmap, PIC64GX_PINMUX_REG, group->mask, group->setting); in pic64gx_gpio2_pinmux_set_mux()
/linux/drivers/memory/
H A Dda8xx-ddrctl.c70 da8xx_ddrctl_match_knob(const struct da8xx_ddrctl_setting *setting) in da8xx_ddrctl_match_knob() argument
78 if (strcmp(knob->name, setting->name) == 0) in da8xx_ddrctl_match_knob()
103 const struct da8xx_ddrctl_setting *setting; in da8xx_ddrctl_probe() local
111 setting = da8xx_ddrctl_get_board_settings(); in da8xx_ddrctl_probe()
112 if (!setting) { in da8xx_ddrctl_probe()
123 for (; setting->name; setting++) { in da8xx_ddrctl_probe()
124 knob = da8xx_ddrctl_match_knob(setting); in da8xx_ddrctl_probe()
127 "no such config option: %s\n", setting->name); in da8xx_ddrctl_probe()
140 reg |= setting->val << knob->shift; in da8xx_ddrctl_probe()
142 dev_dbg(dev, "writing 0x%08x to %s\n", reg, setting->name); in da8xx_ddrctl_probe()
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-asxx-defs.h65 uint64_t setting:5; member
67 uint64_t setting:5;
78 uint64_t setting:5; member
80 uint64_t setting:5;
159 uint64_t setting:5; member
161 uint64_t setting:5;
213 uint64_t setting:5; member
215 uint64_t setting:5;
336 uint64_t setting:5; member
338 uint64_t setting:5;
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/linux/drivers/interconnect/imx/
H A Dimx.c25 const struct imx_icc_noc_setting *setting; member
47 if (node_data->setting && node->peak_bw) { in imx_icc_node_set()
48 base = node_data->setting->reg + node_data->imx_provider->noc_base; in imx_icc_node_set()
49 if (node_data->setting->mode == IMX_NOC_MODE_FIXED) { in imx_icc_node_set()
50 prio = node_data->setting->prio_level; in imx_icc_node_set()
53 writel(node_data->setting->mode, base + IMX_NOC_MODE_REG); in imx_icc_node_set()
54 writel(node_data->setting->ext_control, base + IMX_NOC_EXT_CTL_REG); in imx_icc_node_set()
56 node_data->desc->name, node_data->setting->mode, prio, in imx_icc_node_set()
57 node_data->setting->ext_control); in imx_icc_node_set()
58 } else if (node_data->setting->mode == IMX_NOC_MODE_UNCONFIGURED) { in imx_icc_node_set()
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/linux/drivers/leds/flash/
H A Dleds-lm3601x.c325 struct led_flash_setting *setting; in lm3601x_register_leds() local
330 setting = &led->fled_cdev.timeout; in lm3601x_register_leds()
331 setting->min = LM3601X_MIN_TIMEOUT_US; in lm3601x_register_leds()
332 setting->max = led->max_flash_timeout; in lm3601x_register_leds()
333 setting->step = LM3601X_LOWER_STEP_US; in lm3601x_register_leds()
334 setting->val = led->max_flash_timeout; in lm3601x_register_leds()
336 setting = &led->fled_cdev.brightness; in lm3601x_register_leds()
337 setting->min = LM3601X_MIN_STROBE_I_UA; in lm3601x_register_leds()
338 setting->max = led->flash_current_max; in lm3601x_register_leds()
339 setting->step = LM3601X_TORCH_REG_DIV; in lm3601x_register_leds()
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H A Dleds-ktd2692.c175 struct led_flash_setting *setting; in ktd2692_init_flash_timeout() local
177 setting = &fled_cdev->timeout; in ktd2692_init_flash_timeout()
178 setting->min = KTD2692_FLASH_MODE_TIMEOUT_DISABLE; in ktd2692_init_flash_timeout()
179 setting->max = cfg->flash_max_timeout; in ktd2692_init_flash_timeout()
180 setting->step = cfg->flash_max_timeout in ktd2692_init_flash_timeout()
182 setting->val = cfg->flash_max_timeout; in ktd2692_init_flash_timeout()
H A Dleds-aat1290.c358 struct led_flash_setting *setting; in aat1290_init_flash_timeout() local
361 setting = &fled_cdev->timeout; in aat1290_init_flash_timeout()
362 setting->min = cfg->max_flash_tm / AAT1290_FLASH_TM_NUM_LEVELS; in aat1290_init_flash_timeout()
363 setting->max = cfg->max_flash_tm; in aat1290_init_flash_timeout()
364 setting->step = setting->min; in aat1290_init_flash_timeout()
365 setting->val = setting->max; in aat1290_init_flash_timeout()
H A Dleds-max77693.c793 struct led_flash_setting *setting; in max77693_init_flash_settings() local
796 setting = &fled_cdev->brightness; in max77693_init_flash_settings()
797 setting->min = FLASH_IOUT_MIN; in max77693_init_flash_settings()
798 setting->max = led->iout_joint ? in max77693_init_flash_settings()
802 setting->step = FLASH_IOUT_STEP; in max77693_init_flash_settings()
803 setting->val = setting->max; in max77693_init_flash_settings()
806 setting = &fled_cdev->timeout; in max77693_init_flash_settings()
807 setting->min = FLASH_TIMEOUT_MIN; in max77693_init_flash_settings()
808 setting->max = led_cfg->flash_timeout_max[fled_id]; in max77693_init_flash_settings()
809 setting->step = FLASH_TIMEOUT_STEP; in max77693_init_flash_settings()
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/linux/Documentation/arch/riscv/
H A Dvector.rst34 enablement status on execve(). The system-wide default setting can be
49 enablement status of current thread, and the setting at bit[3:2] takes place
50 at next execve(). bit[4] defines the inheritance mode of the setting in
62 Vector enablement setting for the calling thread at the next execve()
68 mode for the setting at PR_RISCV_V_VSTATE_CTRL_NEXT_MASK. If the bit
69 is set then the following execve() will not clear the setting in both
71 This setting persists across changes in the system-wide default value.
81 * A valid setting for PR_RISCV_V_VSTATE_CTRL_CUR_MASK takes place
86 * Every successful call overwrites a previous setting for the calling
125 setting in PR_RISCV_V_VSTATE_CTRL_NEXT_MASK is not
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/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_txrx.h26 #define ITR_TO_REG(setting) ((setting) & ~IAVF_ITR_DYNAMIC) argument
27 #define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~IAVF_ITR_MASK) argument
28 #define ITR_IS_DYNAMIC(setting) (!!((setting) & IAVF_ITR_DYNAMIC)) argument
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_sriov.h29 int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting);
31 bool setting);
32 int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting);
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.c300 struct mvebu_mpp_ctrl_setting *setting; in mvebu_pinmux_set() local
304 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp, in mvebu_pinmux_set()
306 if (!setting) { in mvebu_pinmux_set()
313 config = setting->val; in mvebu_pinmux_set()
329 struct mvebu_mpp_ctrl_setting *setting; in mvebu_pinmux_gpio_request_enable() local
339 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); in mvebu_pinmux_gpio_request_enable()
340 if (!setting) in mvebu_pinmux_gpio_request_enable()
343 config = setting->val; in mvebu_pinmux_gpio_request_enable()
353 struct mvebu_mpp_ctrl_setting *setting; in mvebu_pinmux_gpio_set_direction() local
362 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp); in mvebu_pinmux_gpio_set_direction()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_txrx.h26 #define ITR_TO_REG(setting) ((setting) & ~I40E_ITR_DYNAMIC) argument
27 #define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~I40E_ITR_MASK) argument
28 #define ITR_IS_DYNAMIC(setting) (!!((setting) & I40E_ITR_DYNAMIC)) argument
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-lenovo14 Description: If this setting is enabled, it is possible to do dragging by pressing the trackpoint. …
23 Description: For details regarding this setting please refer to http://www.pc.ibm.com/ww/healthycom…
30 Description: This setting controls if the mouse click events generated by pressing the trackpoint (…
47 Description: This setting controls how fast the trackpoint needs to be pressed to generate a mouse …
56 Description: This setting controls whether Fn Lock is enabled on the keyboard (i.e. if F1 is Mute o…
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g044l2-smarc.dts15 * Disable PMOD1_SER0 by setting "#define PMOD1_SER0 0" above and
16 * enable PMOD_MTU3 by setting "#define PMOD_MTU3 1" below.
32 * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT 1"
H A Dr9a07g054l2-smarc.dts15 * Disable PMOD1_SER0 by setting "#define PMOD1_SER0 0" above and
16 * enable PMOD_MTU3 by setting "#define PMOD_MTU3 1" below.
31 * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT 1"
/linux/Documentation/hwmon/
H A Dina3221.rst35 curr[123]_crit Critical alert current(mA) setting, activates the
39 curr[123]_max Warning alert current(mA) setting, activates the
49 curr4_crit Critical alert current(mA) setting for sum of current
72 Note that setting update_interval to 0ms sets both BC
/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/
H A Dlegacy.c240 u8 setting) in _mlx5_eswitch_set_vepa_locked() argument
249 if (!setting) { in _mlx5_eswitch_set_vepa_locked()
309 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting) in mlx5_eswitch_set_vepa() argument
325 err = _mlx5_eswitch_set_vepa_locked(esw, setting); in mlx5_eswitch_set_vepa()
332 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting) in mlx5_eswitch_get_vepa() argument
343 *setting = esw->fdb_table.legacy.vepa_uplink_rule ? 1 : 0; in mlx5_eswitch_get_vepa()
486 u16 vport, bool setting) in mlx5_eswitch_set_vport_trust() argument
501 evport->info.trusted = setting; in mlx5_eswitch_set_vport_trust()
/linux/Documentation/input/devices/
H A Dedt-ft5x06.rst18 allows setting the "click"-threshold in the range from 0 to 80.
21 allows setting the sensitivity in the range from 0 to 31. Note that
25 allows setting the edge compensation in the range from 0 to 31.
28 allows setting the report rate in the range from 3 to 14.
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst58 GICv2 specs. Getting or setting such a register has the same effect as
68 Userspace should set GICD_IIDR before setting any other registers (both
76 -ENXIO Getting or setting this register is not yet supported
92 defined in the GICv2 specs. Getting or setting such a register has the
101 state by setting the corresponding bit.
123 -ENXIO Getting or setting this register is not yet supported
/linux/arch/riscv/boot/dts/renesas/
H A Dr9a07g043f01-smarc.dts11 * DIP-Switch SW1 setting
15 * Please change below macros according to SW1 setting on the SoM

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