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Searched refs:set_rate (Results 1 – 25 of 249) sorted by relevance

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/linux/drivers/clk/ti/
H A Ddpll.c28 .set_rate = &omap3_noncore_dpll_set_rate,
50 .set_rate = &omap3_noncore_dpll_set_rate,
62 .set_rate = &omap3_noncore_dpll_set_rate,
81 .set_rate = &omap2_reprogram_dpllcore,
99 .set_rate = &omap3_noncore_dpll_set_rate,
110 .set_rate = &omap3_dpll5_set_rate,
121 .set_rate = &omap3_dpll4_set_rate,
/linux/drivers/sh/clk/
H A Dcpg.c185 .set_rate = sh_clk_div_set_rate,
191 .set_rate = sh_clk_div_set_rate,
318 .set_rate = sh_clk_div_set_rate,
370 .set_rate = sh_clk_div_set_rate,
450 .set_rate = fsidiv_set_rate,
H A Dcore.c490 if (likely(clk->ops && clk->ops->set_rate)) { in clk_set_rate()
491 ret = clk->ops->set_rate(clk, rate); in clk_set_rate()
583 if (likely(clkp->ops->set_rate)) in clks_core_resume()
584 clkp->ops->set_rate(clkp, rate); in clks_core_resume()
/linux/drivers/clk/
H A Dclk-composite.c149 return rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate()
169 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
173 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
268 if (rate_ops->set_rate) { in __clk_hw_register_composite()
270 clk_composite_ops->set_rate = in __clk_hw_register_composite()
282 if (mux_ops->set_parent && rate_ops->set_rate) in __clk_hw_register_composite()
/linux/drivers/clk/mvebu/
H A Dclk-corediv.c205 .set_rate = clk_corediv_set_rate,
221 .set_rate = clk_corediv_set_rate,
234 .set_rate = clk_corediv_set_rate,
246 .set_rate = clk_corediv_set_rate,
/linux/drivers/clk/mxs/
H A Dclk-div.c57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
67 .set_rate = clk_div_set_rate,
/linux/drivers/clk/st/
H A Dclk-flexgen.c185 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
186 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
188 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
189 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
203 .set_rate = flexgen_set_rate,
/linux/drivers/clk/tegra/
H A Dclk-periph.c69 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
134 .set_rate = clk_periph_set_rate,
158 .set_rate = clk_periph_set_rate,
H A Dclk-tegra-super-cclk.c46 return tegra_clk_super_ops.set_rate(hw, rate, parent_rate); in cclk_super_set_rate()
121 .set_rate = cclk_super_set_rate,
H A Dclk-audio-sync.c42 .set_rate = clk_sync_source_set_rate,
/linux/drivers/clk/samsung/
H A Dclk-acpm.c80 return clk->handle->ops->dvfs.set_rate(clk->handle, clk->mbox_chan_id, in acpm_clk_set_rate()
87 .set_rate = acpm_clk_set_rate,
H A Dclk-pll.c303 .set_rate = samsung_pll35xx_set_rate,
414 .set_rate = samsung_pll36xx_set_rate,
519 .set_rate = samsung_pll0822x_set_rate,
615 .set_rate = samsung_pll0831x_set_rate,
740 .set_rate = samsung_pll45xx_set_rate,
885 .set_rate = samsung_pll46xx_set_rate,
1098 .set_rate = samsung_pll2550xx_set_rate,
1190 .set_rate = samsung_pll2650x_set_rate,
1280 .set_rate = samsung_pll2650xx_set_rate,
1441 .set_rate = samsung_pll1031x_set_rate,
[all …]
/linux/drivers/clk/qcom/
H A Dclk-rcg2.c807 .set_rate = clk_rcg2_set_rate,
820 .set_rate = clk_rcg2_set_gp_rate,
832 .set_rate = clk_rcg2_set_floor_rate,
845 .set_rate = clk_rcg2_fm_set_rate,
980 .set_rate = clk_edp_pixel_set_rate,
1038 .set_rate = clk_byte_set_rate,
1108 .set_rate = clk_byte2_set_rate,
1201 .set_rate = clk_pixel_set_rate,
1316 .set_rate = clk_gfx3d_set_rate,
1553 .set_rate = clk_rcg2_shared_set_rate,
[all …]
H A Dclk-rcg.c829 .set_rate = clk_rcg_set_rate,
840 .set_rate = clk_rcg_set_floor_rate,
851 .set_rate = clk_rcg_bypass_set_rate,
862 .set_rate = clk_rcg_bypass2_set_rate,
874 .set_rate = clk_rcg_pixel_set_rate,
886 .set_rate = clk_rcg_esc_set_rate,
898 .set_rate = clk_rcg_lcc_set_rate,
910 .set_rate = clk_dyn_rcg_set_rate,
/linux/drivers/clk/imx/
H A Dclk-pllv3.c157 .set_rate = clk_pllv3_set_rate,
214 .set_rate = clk_pllv3_sys_set_rate,
305 .set_rate = clk_pllv3_av_set_rate,
401 .set_rate = clk_pllv3_vf610_set_rate,
H A Dclk-busy.c63 ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); in clk_busy_divider_set_rate()
73 .set_rate = clk_busy_divider_set_rate,
/linux/drivers/clk/ux500/
H A Dclk-prcmu.c163 .set_rate = clk_prcmu_set_rate,
175 .set_rate = clk_prcmu_set_rate,
193 .set_rate = clk_prcmu_set_rate,
/linux/include/linux/phy/
H A Dphy-dp.h76 u8 set_rate : 1; member
/linux/include/linux/qed/
H A Dqed_iov_if.h28 int (*set_rate) (struct qed_dev *cdev, int vfid, member
/linux/sound/usb/6fire/
H A Dcontrol.h31 int (*set_rate)(struct control_runtime *rt, int rate); member
/linux/sound/soc/codecs/
H A Dtlv320aic32x4-clk.c269 .set_rate = clk_aic32x4_pll_set_rate,
363 .set_rate = clk_aic32x4_div_set_rate,
391 .set_rate = clk_aic32x4_div_set_rate,
/linux/drivers/clk/at91/
H A Dclk-usb.c181 .set_rate = at91sam9x5_clk_usb_set_rate,
219 .set_rate = at91sam9x5_clk_usb_set_rate,
390 .set_rate = at91rm9200_clk_usb_set_rate,
H A Dclk-audio-pll.c436 .set_rate = clk_audio_pll_frac_set_rate,
444 .set_rate = clk_audio_pll_pad_set_rate,
452 .set_rate = clk_audio_pll_pmc_set_rate,
/linux/drivers/clk/sifive/
H A Dfu540-prci.h51 .set_rate = sifive_prci_wrpll_set_rate,
/linux/drivers/clk/sprd/
H A Dcomposite.c57 .set_rate = sprd_comp_set_rate,

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