| /linux/drivers/clk/mediatek/ |
| H A D | clk-mux.c | 239 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
249 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
259 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
269 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
422 ret = mux_nb->ops->set_parent(hw, mux_nb->bypass_index); in mtk_clk_mux_notifier_cb()
426 ret = mux_nb->ops->set_parent(hw, mux_nb->original_index); in mtk_clk_mux_notifier_cb()
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| /linux/drivers/clk/ |
| H A D | clk-composite.c | 30 return mux_ops->set_parent(mux_hw, index); in clk_composite_set_parent()
84 mux_hw && mux_ops && mux_ops->set_parent) { in clk_composite_determine_rate()
195 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
197 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
275 if (mux_ops->set_parent) in __clk_hw_register_composite()
276 clk_composite_ops->set_parent = clk_composite_set_parent; in __clk_hw_register_composite()
310 if (mux_ops->set_parent && rate_ops->set_rate) in __clk_hw_register_composite()
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| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra-super-cclk.c | 40 return tegra_clk_super_ops.set_parent(hw, index); in cclk_super_set_parent()
120 .set_parent = cclk_super_set_parent,
128 .set_parent = cclk_super_set_parent,
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| H A D | clk-periph.c | 33 return mux_ops->set_parent(mux_hw, index); in clk_periph_set_parent()
131 .set_parent = clk_periph_set_parent,
145 .set_parent = clk_periph_set_parent,
155 .set_parent = clk_periph_set_parent,
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| H A D | clk-super.c | 141 .set_parent = clk_super_set_parent,
194 .set_parent = clk_super_set_parent,
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| /linux/drivers/clk/ti/ |
| H A D | dpll.c | 29 .set_parent = &omap3_noncore_dpll_set_parent,
51 .set_parent = &omap3_noncore_dpll_set_parent,
63 .set_parent = &omap3_noncore_dpll_set_parent,
100 .set_parent = &omap3_noncore_dpll_set_parent,
111 .set_parent = &omap3_noncore_dpll_set_parent,
122 .set_parent = &omap3_noncore_dpll_set_parent,
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| /linux/drivers/clk/qcom/ |
| H A D | clk-rcg2.c | 804 .set_parent = clk_rcg2_set_parent,
817 .set_parent = clk_rcg2_set_parent,
829 .set_parent = clk_rcg2_set_parent,
842 .set_parent = clk_rcg2_set_parent,
855 .set_parent = clk_rcg2_set_parent,
978 .set_parent = clk_rcg2_set_parent,
1036 .set_parent = clk_rcg2_set_parent,
1106 .set_parent = clk_rcg2_set_parent,
1197 .set_parent = clk_rcg2_set_parent,
1312 .set_parent = clk_rcg2_set_parent,
[all …]
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| H A D | clk-rcg.c | 826 .set_parent = clk_rcg_set_parent,
837 .set_parent = clk_rcg_set_parent,
848 .set_parent = clk_rcg_set_parent,
859 .set_parent = clk_rcg_set_parent,
871 .set_parent = clk_rcg_set_parent,
883 .set_parent = clk_rcg_set_parent,
895 .set_parent = clk_rcg_set_parent,
907 .set_parent = clk_dyn_rcg_set_parent,
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| H A D | clk-regmap-mux.c | 54 .set_parent = mux_set_parent,
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| H A D | apss-ipq6018.c | 105 err = clk_rcg2_mux_closest_ops.set_parent(hw, index); in cpu_clk_notifier_fn()
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| /linux/drivers/clk/versatile/ |
| H A D | clk-sp810.c | 68 .set_parent = clk_sp810_timerclken_set_parent,
129 init.ops->set_parent(&sp810->timerclken[i].hw, 1); in clk_sp810_of_setup()
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 215 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
250 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
449 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
485 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
698 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3399_pll_set_params()
734 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3399_pll_set_params()
949 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3588_pll_set_params()
983 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3588_pll_set_params()
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| H A D | clk-muxgrf.c | 52 .set_parent = rockchip_muxgrf_set_parent,
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| /linux/drivers/clk/pxa/ |
| H A D | clk-pxa.h | 24 .set_parent = dummy_clk_set_parent, \
75 .set_parent = name ## _set_parent, \
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| /linux/drivers/sh/clk/ |
| H A D | core.c | 523 if (clk->ops->set_parent) in clk_set_parent()
524 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
580 if (likely(clkp->ops->set_parent)) in clks_core_resume()
581 clkp->ops->set_parent(clkp, in clks_core_resume()
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| /linux/drivers/clk/imx/ |
| H A D | clk-busy.c | 143 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
153 .set_parent = clk_busy_mux_set_parent,
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| /linux/drivers/clk/socfpga/ |
| H A D | clk-gate.c | 134 .set_parent = socfpga_clk_set_parent,
194 ops->set_parent = NULL; in socfpga_gate_init()
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| /linux/sound/soc/codecs/ |
| H A D | tlv320aic32x4-clk.c | 272 .set_parent = clk_aic32x4_pll_set_parent,
297 .set_parent = clk_aic32x4_codec_clkin_set_parent,
391 .set_parent = clk_aic32x4_bdiv_set_parent,
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| /linux/drivers/clk/sprd/ |
| H A D | composite.c | 53 .set_parent = sprd_comp_set_parent,
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| H A D | mux.c | 73 .set_parent = sprd_mux_set_parent,
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| /linux/drivers/clk/actions/ |
| H A D | owl-mux.c | 58 .set_parent = owl_mux_set_parent,
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| /linux/drivers/clk/at91/ |
| H A D | clk-i2s-mux.c | 47 .set_parent = clk_i2s_mux_set_parent,
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| /linux/drivers/clk/uniphier/ |
| H A D | clk-uniphier-mux.c | 52 .set_parent = uniphier_clk_mux_set_parent,
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| H A D | clk-uniphier-cpugear.c | 72 .set_parent = uniphier_clk_cpugear_set_parent,
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| /linux/drivers/clk/davinci/ |
| H A D | da8xx-cfgchip.c | 233 .set_parent = da8xx_cfgchip_mux_clk_set_parent,
500 .set_parent = da8xx_usb0_clk48_set_parent,
570 .set_parent = da8xx_usb1_clk48_set_parent,
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