Searched refs:set_hw_resources (Results 1 – 2 of 2) sorted by relevance
271 union UMSCHAPI__SET_HW_RESOURCES set_hw_resources = {}; in umsch_mm_v4_0_set_hw_resources() local275 set_hw_resources.header.type = UMSCH_API_TYPE_SCHEDULER; in umsch_mm_v4_0_set_hw_resources()276 set_hw_resources.header.opcode = UMSCH_API_SET_HW_RSRC; in umsch_mm_v4_0_set_hw_resources()277 set_hw_resources.header.dwsize = API_FRAME_SIZE_IN_DWORDS; in umsch_mm_v4_0_set_hw_resources()279 set_hw_resources.vmid_mask_mm_vcn = umsch->vmid_mask_mm_vcn; in umsch_mm_v4_0_set_hw_resources()280 set_hw_resources.vmid_mask_mm_vpe = umsch->vmid_mask_mm_vpe; in umsch_mm_v4_0_set_hw_resources()281 set_hw_resources.collaboration_mask_vpe = in umsch_mm_v4_0_set_hw_resources()283 set_hw_resources.engine_mask = umsch->engine_mask; in umsch_mm_v4_0_set_hw_resources()285 set_hw_resources.vcn0_hqd_mask[0] = umsch->vcn0_hqd_mask; in umsch_mm_v4_0_set_hw_resources()286 set_hw_resources.vcn1_hqd_mask[0] = umsch->vcn1_hqd_mask; in umsch_mm_v4_0_set_hw_resources()[all …]
119 int (*set_hw_resources)(struct amdgpu_umsch_mm *umsch); member212 ((umsch)->funcs->set_hw_resources ? (umsch)->funcs->set_hw_resources((umsch)) : 0)