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Searched refs:sel_clk (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/armada/
H A Darmada_510.c17 struct clk *sel_clk; member
125 v->sel_clk = res.clk; in armada510_crtc_compute_clock()
147 if (!dcrtc->clk && v->sel_clk) { in armada510_crtc_enable()
148 if (!WARN_ON(clk_prepare_enable(v->sel_clk))) in armada510_crtc_enable()
149 dcrtc->clk = v->sel_clk; in armada510_crtc_enable()
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddfp.c218 state->sel_clk |= bits1618; in nv04_dfp_prepare_sel_clk()
220 state->sel_clk &= ~bits1618; in nv04_dfp_prepare_sel_clk()
237 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) { in nv04_dfp_prepare_sel_clk()
238 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk()
240 state->sel_clk &= ~0xf0; in nv04_dfp_prepare_sel_clk()
241 state->sel_clk |= (head ? 0x40 : 0x10) << shift; in nv04_dfp_prepare_sel_clk()
557 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv04_lvds_dpms()
558 nv04_display(dev)->mode_reg.sel_clk &= ~0xf0; in nv04_lvds_dpms()
560 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv04_lvds_dpms()
H A Ddisp.h80 uint32_t sel_clk; member
H A Dcrtc.c665 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv_crtc_mode_set()
686 state->sel_clk = saved->sel_clk & ~(0x5 << 16); in nv_crtc_save()
H A Dhw.c406 state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv_save_state_ramdac()
483 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, state->sel_clk); in nv_load_state_ramdac()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dpll.c389 u32 sel_clk = nvkm_rd32(device, 0x680524); in nvbios_pll_parse() local
390 if ((info->reg == 0x680508 && sel_clk & 0x20) || in nvbios_pll_parse()
391 (info->reg == 0x680520 && sel_clk & 0x80)) { in nvbios_pll_parse()