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Searched refs:sdmmc_mux (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/tegra/
H A Dclk-sdmmc-mux.c43 struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw); in clk_sdmmc_mux_get_parent() local
50 val = readl_relaxed(sdmmc_mux->reg); in clk_sdmmc_mux_get_parent()
69 struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw); in clk_sdmmc_mux_set_parent() local
73 val = readl_relaxed(sdmmc_mux->reg); in clk_sdmmc_mux_set_parent()
82 writel(val, sdmmc_mux->reg); in clk_sdmmc_mux_set_parent()
90 struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw); in clk_sdmmc_mux_recalc_rate() local
95 val = readl_relaxed(sdmmc_mux->reg); in clk_sdmmc_mux_recalc_rate()
110 struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw); in clk_sdmmc_mux_determine_rate() local
120 div = div_frac_get(req->rate, output_rate, 8, 1, sdmmc_mux->div_flags); in clk_sdmmc_mux_determine_rate()
124 if (sdmmc_mux->div_flags & TEGRA_DIVIDER_ROUND_UP) in clk_sdmmc_mux_determine_rate()
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/linux/drivers/clk/socfpga/
H A Dclk-s10.c146 static const struct clk_parent_data sdmmc_mux[] = { variable
288 { STRATIX10_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0xA4,
H A Dclk-agilex.c183 static const struct clk_parent_data sdmmc_mux[] = { variable
317 { AGILEX_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0x7C,