/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | marvell,dove-pinctrl.txt | 18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu* 19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu* 20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt), 22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act), 31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) 40 mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda), 42 mpp18 18 gpio, uart3(txd), sdio0(buspwr), ac97(sdi3), lcd0(pwm) 43 mpp19 19 gpio, uart3(rxd), sdio0(ledctrl), twsi(sck) 44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso), [all …]
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/linux/arch/arm/boot/dts/marvell/ |
H A D | dove-cubox-es.dts | 9 &sdio0 { 10 /* sdio0 card detect is connected to wrong pin on CuBox ES */
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H A D | dove-dove-db.dts | 22 &sdio0 { status = "okay"; };
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H A D | dove-d2plug.dts | 48 &sdio0 {
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-rock-4se.dts | 16 mmc2 = &sdio0; 20 &sdio0 {
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H A D | rk3399-rock-pi-4b.dts | 16 mmc2 = &sdio0; 20 &sdio0 {
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H A D | rk3399-rock-pi-4b-plus.dts | 16 mmc2 = &sdio0; 27 &sdio0 {
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H A D | rk3399-rock-pi-4c.dts | 17 mmc2 = &sdio0; 28 &sdio0 {
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H A D | rk3399-rock960.dtsi | 13 mmc0 = &sdio0; 455 sdio0 { 456 sdio0_bus4: sdio0-bus4 { 464 sdio0_cmd: sdio0-cmd { 469 sdio0_clk: sdio0-clk { 514 &sdio0 {
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H A D | rk3399-roc-pc-mezzanine.dts | 15 mmc2 = &sdio0; 92 &sdio0 {
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H A D | rk3368.dtsi | 196 sdio0: mmc@ff0d0000 { label 1198 sdio0 { 1199 sdio0_bus1: sdio0-bus1 { 1203 sdio0_bus4: sdio0-bus4 { 1210 sdio0_cmd: sdio0-cmd { 1214 sdio0_clk: sdio0-clk { 1218 sdio0_cd: sdio0-cd { 1222 sdio0_wp: sdio0-wp { 1226 sdio0_pwr: sdio0-pwr { 1230 sdio0_bkpwr: sdio0-bkpwr { [all …]
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H A D | rk3399-rock-pi-4.dtsi | 592 sdio0 { 593 sdio0_bus4: sdio0-bus4 { 600 sdio0_cmd: sdio0-cmd { 604 sdio0_clk: sdio0-clk { 656 &sdio0 {
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H A D | rk3399-sapphire-excavator.dts | 14 mmc2 = &sdio0; 221 &sdio0 {
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/linux/Documentation/devicetree/bindings/reset/ |
H A D | zynq-reset.txt | 37 192: sdio0 reset 39 196: sdio0 ref reset
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron.dtsi | 367 &sdio0 { 530 sdio0 { 549 * We run sdio0 at max speed; bump up drive strength. 552 sdio0_bus4: sdio0-bus4 { 559 sdio0_cmd: sdio0-cmd { 563 sdio0_clk: sdio0-clk {
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H A D | rk3288.dtsi | 39 mshc2 = &sdio0; 231 sdio0: mmc@ff0d0000 { label 1736 sdio0 { 1737 sdio0_bus1: sdio0-bus1 { 1741 sdio0_bus4: sdio0-bus4 { 1748 sdio0_cmd: sdio0-cmd { 1752 sdio0_clk: sdio0-clk { 1756 sdio0_cd: sdio0-cd { 1760 sdio0_wp: sdio0-wp { 1764 sdio0_pwr: sdio0-pwr { [all …]
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/linux/arch/arm/mach-dove/ |
H A D | common.c | 83 struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1; in dove_clk_init() local 94 sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0); in dove_clk_init() 119 orion_clkdev_add(NULL, "sdhci-dove.0", sdio0); in dove_clk_init()
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | zynq-7000.txt | 62 21: sdio0 100 "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
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H A D | mvebu-gated-clock.txt | 141 8 sdio0 SDHCI Host 0 201 sdio0: sdio@92000 { 203 /* get clk gate bit 8 (sdio0) */
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7100-common.dtsi | 15 mmc0 = &sdio0; 220 sdio0_pins: sdio0-0 { 368 &sdio0 {
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/linux/arch/arm64/boot/dts/broadcom/stingray/ |
H A D | bcm958802a802x.dts | 19 &sdio0 {
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H A D | stingray-board-base.dtsi | 36 &sdio0 {
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/linux/arch/riscv/boot/dts/thead/ |
H A D | th1520-lichee-module-4a.dtsi | 42 &sdio0 {
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H A D | th1520-beaglev-ahead.dts | 62 &sdio0 {
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/linux/arch/arm64/boot/dts/sprd/ |
H A D | ums512-1h10.dts | 41 &sdio0 {
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