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Searched refs:scratch (Results 1 – 25 of 297) sorted by relevance

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/linux/arch/arc/kernel/
H A Dsignal.c108 uregs.scratch.bta = regs->bta; in stash_usr_regs()
109 uregs.scratch.lp_start = regs->lp_start; in stash_usr_regs()
110 uregs.scratch.lp_end = regs->lp_end; in stash_usr_regs()
111 uregs.scratch.lp_count = regs->lp_count; in stash_usr_regs()
112 uregs.scratch.status32 = regs->status32; in stash_usr_regs()
113 uregs.scratch.ret = regs->ret; in stash_usr_regs()
114 uregs.scratch.blink = regs->blink; in stash_usr_regs()
115 uregs.scratch.fp = regs->fp; in stash_usr_regs()
116 uregs.scratch.gp = regs->r26; in stash_usr_regs()
117 uregs.scratch.r12 = regs->r12; in stash_usr_regs()
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H A Dptrace.c192 REG_IN_ONE(scratch.bta, &ptregs->bta); in genregs_set()
193 REG_IN_ONE(scratch.lp_start, &ptregs->lp_start); in genregs_set()
194 REG_IN_ONE(scratch.lp_end, &ptregs->lp_end); in genregs_set()
195 REG_IN_ONE(scratch.lp_count, &ptregs->lp_count); in genregs_set()
197 REG_IGNORE_ONE(scratch.status32); in genregs_set()
199 REG_IN_ONE(scratch.ret, &ptregs->ret); in genregs_set()
200 REG_IN_ONE(scratch.blink, &ptregs->blink); in genregs_set()
201 REG_IN_ONE(scratch.fp, &ptregs->fp); in genregs_set()
202 REG_IN_ONE(scratch.gp, &ptregs->r26); in genregs_set()
203 REG_IN_ONE(scratch.r12, &ptregs->r12); in genregs_set()
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/linux/arch/sparc/include/asm/
H A Dwinmacro.h50 #define LOAD_PT_YREG(base_reg, scratch) \ argument
51 ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \
52 wr %scratch, 0x0, %y;
59 #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \ argument
60 LOAD_PT_YREG(base_reg, scratch) \
77 #define STORE_PT_YREG(base_reg, scratch) \ argument
78 rd %y, %scratch; \
79 st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y];
92 #define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \ argument
93 ld [%cur_reg + TI_W_SAVED], %scratch; \
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/linux/drivers/infiniband/hw/irdma/
H A Duda.h40 u32 op, u64 scratch);
43 u64 scratch);
51 struct irdma_ah_info *info, u64 scratch) in irdma_sc_create_ah() argument
54 scratch); in irdma_sc_create_ah()
58 struct irdma_ah_info *info, u64 scratch) in irdma_sc_destroy_ah() argument
61 scratch); in irdma_sc_destroy_ah()
66 u64 scratch) in irdma_sc_create_mcast_grp() argument
69 scratch); in irdma_sc_create_mcast_grp()
74 u64 scratch) in irdma_sc_modify_mcast_grp() argument
77 scratch); in irdma_sc_modify_mcast_grp()
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H A Dtype.h669 u64 scratch; member
1164 int irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch,
1166 int irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch, bool post_sq);
1172 int irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratch);
1175 int irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratch, bool post_sq);
1202 struct irdma_create_qp_info *info, u64 scratch,
1204 int irdma_sc_qp_destroy(struct irdma_sc_qp *qp, u64 scratch,
1207 struct irdma_qp_flush_info *info, u64 scratch,
1211 struct irdma_modify_qp_info *info, u64 scratch,
1221 int irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch, bool post_sq);
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn3.c124 if (pmo->scratch.pmo_dcn3.current_candidate[0] > 0) { in iterate_to_next_candidiate()
125 pmo->scratch.pmo_dcn3.current_candidate[0]--; in iterate_to_next_candidiate()
128 for (borrow_from = 1; borrow_from < size && pmo->scratch.pmo_dcn3.current_candidate[borrow_from] == 0; borrow_from++) in iterate_to_next_candidiate()
132 pmo->scratch.pmo_dcn3.current_candidate[borrow_from]--; in iterate_to_next_candidiate()
134 pmo->scratch.pmo_dcn3.current_candidate[i] = pmo->scratch.pmo_dcn3.reserved_time_candidates_count[i] - 1; in iterate_to_next_candidiate()
533 pmo->scratch.pmo_dcn3.min_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn3_init_for_pstate_support()
534 pmo->scratch.pmo_dcn3.max_latency_index = pmo->mcg_clock_table_size - 1; in pmo_dcn3_init_for_pstate_support()
535 pmo->scratch.pmo_dcn3.cur_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn3_init_for_pstate_support()
537 pmo->scratch in pmo_dcn3_init_for_pstate_support()
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H A Ddml2_pmo_dcn4_fams2.c908 struct dml2_pmo_scratch *s = &pmo->scratch; in all_timings_support_drr()
946 set_bit_in_bitfield(&pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[timing_group_idx], j); in all_timings_support_svp()
966 valid &= is_bit_set_in_bitfield(pmo->scratch.pmo_dcn4.stream_vactive_capability_mask, i); in all_timings_support_svp()
984 if (mask != pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[i]) { in insert_into_candidate_list()
1015 stream_fams2_meta = &pmo->scratch.pmo_dcn4.stream_fams2_meta[i]; in build_method_scheduling_params()
1073 stream_fams2_meta = &pmo->scratch.pmo_dcn4.stream_fams2_meta[i]; in is_timing_group_schedulable()
1079 microschedule_vlines = calc_svp_microschedule(&pmo->scratch.pmo_dcn4.stream_fams2_meta[i]); in is_timing_group_schedulable()
1100 static void insert_into_candidate_list(const struct dml2_pmo_pstate_strategy *pstate_strategy, int stream_count, struct dml2_pmo_scratch *scratch) in is_timing_group_schedulable()
1102 scratch->pmo_dcn4.pstate_strategy_candidates[scratch in is_timing_group_schedulable()
970 insert_into_candidate_list(const enum dml2_pmo_pstate_strategy * per_stream_pstate_strategy,int stream_count,struct dml2_pmo_scratch * scratch) insert_into_candidate_list() argument
1728 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_planes_for_svp_by_mask() local
1751 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_planes_for_svp_drr_by_mask() local
1850 struct dml2_pmo_scratch *scratch = &pmo->scratch; setup_display_config() local
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H A Ddml2_pmo_dcn4.c
/linux/drivers/mmc/host/
H A Dsdhci-pci-o2micro.c112 u16 scratch; in sdhci_o2_enable_internal_clock() local
132 scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
133 if (scratch & O2_PLL_LOCK_STATUS) in sdhci_o2_enable_internal_clock()
321 u16 scratch = 0; in sdhci_o2_execute_tuning() local
338 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
339 scratch |= O2_SD_PWR_FORCE_L0; in sdhci_o2_execute_tuning()
340 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
420 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
421 scratch &= ~(O2_SD_PWR_FORCE_L0); in sdhci_o2_execute_tuning()
422 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
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H A Dmmc_spi.c98 struct scratch { struct
122 struct scratch *data; argument
405 struct scratch *data = host->data; in mmc_spi_command_send()
515 struct scratch *scratch = host->data; in mmc_spi_setup_data_message() local
527 scratch->data_token = SPI_TOKEN_MULTI_WRITE; in mmc_spi_setup_data_message()
529 scratch->data_token = SPI_TOKEN_SINGLE; in mmc_spi_setup_data_message()
530 t->tx_buf = &scratch->data_token; in mmc_spi_setup_data_message()
548 t->tx_buf = &scratch->crc_val; in mmc_spi_setup_data_message()
551 t->rx_buf = &scratch->crc_val; in mmc_spi_setup_data_message()
572 t->len = write ? sizeof(scratch->status) : 1; in mmc_spi_setup_data_message()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_dc_resource_mgmt.c62 bool is_plane_duplicate = dml2->v20.scratch.plane_duplicate_exists; in get_plane_id()
132 …ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pip… in find_master_pipe_of_plane()
155 ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx], in find_pipes_assigned_to_plane()
536 struct dc_pipe_mapping_scratch *scratch, in add_odm_slice_to_odm_tree() argument
544 …ASSERT(scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine == 1 || scratch->pipe_pool.… in add_odm_slice_to_odm_tree()
546 for (i = 0; i < scratch->pipe_pool.num_pipes_assigned_to_plane_for_mpcc_combine; i++) { in add_odm_slice_to_odm_tree()
547 pipe = &state->res_ctx.pipe_ctx[scratch->pipe_pool.pipes_assigned_to_plane[odm_slice_index][i]]; in add_odm_slice_to_odm_tree()
549 if (scratch->mpc_info.prev_odm_pipe) in add_odm_slice_to_odm_tree()
550 scratch->mpc_info.prev_odm_pipe->next_odm_pipe = pipe; in add_odm_slice_to_odm_tree()
552 pipe->prev_odm_pipe = scratch->mpc_info.prev_odm_pipe; in add_odm_slice_to_odm_tree()
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/linux/arch/arc/include/asm/
H A Dirqflags-compact.h185 .macro IRQ_DISABLE scratch
186 lr \scratch, [status32]
187 bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
188 flag \scratch
192 .macro IRQ_ENABLE scratch
194 lr \scratch, [status32]
195 or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
196 flag \scratch
/linux/crypto/
H A Dscompress.c63 struct scomp_scratch *scratch; in crypto_scomp_free_scratches() local
67 scratch = per_cpu_ptr(&scomp_scratch, i); in crypto_scomp_free_scratches()
69 vfree(scratch->src); in crypto_scomp_free_scratches()
70 vfree(scratch->dst); in crypto_scomp_free_scratches()
71 scratch->src = NULL; in crypto_scomp_free_scratches()
72 scratch->dst = NULL; in crypto_scomp_free_scratches()
78 struct scomp_scratch *scratch; in crypto_scomp_alloc_scratches() local
84 scratch = per_cpu_ptr(&scomp_scratch, i); in crypto_scomp_alloc_scratches()
89 scratch->src = mem; in crypto_scomp_alloc_scratches()
93 scratch->dst = mem; in crypto_scomp_alloc_scratches()
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/linux/lib/
H A Dkunit_iov_iter.c108 u8 *scratch, *buffer; in iov_kunit_copy_to_kvec() local
115 scratch = iov_kunit_create_buffer(test, &spages, npages); in iov_kunit_copy_to_kvec()
117 scratch[i] = pattern(i); in iov_kunit_copy_to_kvec()
126 copied = copy_to_iter(scratch, size, &iter); in iov_kunit_copy_to_kvec()
134 memset(scratch, 0, bufsize); in iov_kunit_copy_to_kvec()
137 scratch[i] = pattern(patt++); in iov_kunit_copy_to_kvec()
141 KUNIT_EXPECT_EQ_MSG(test, buffer[i], scratch[i], "at i=%x", i); in iov_kunit_copy_to_kvec()
142 if (buffer[i] != scratch[i]) in iov_kunit_copy_to_kvec()
158 u8 *scratch, *buffer; in iov_kunit_copy_from_kvec() local
169 scratch = iov_kunit_create_buffer(test, &spages, npages); in iov_kunit_copy_from_kvec()
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/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn20.c98 uint32_t in_reset, scratch, i; in dmub_dcn20_reset() local
124 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn20_reset()
125 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) in dmub_dcn20_reset()
429 diag_data->scratch[0] = REG_READ(DMCUB_SCRATCH0); in dmub_dcn20_get_diagnostic_data()
430 diag_data->scratch[1] = REG_READ(DMCUB_SCRATCH1); in dmub_dcn20_get_diagnostic_data()
431 diag_data->scratch[2] = REG_READ(DMCUB_SCRATCH2); in dmub_dcn20_get_diagnostic_data()
432 diag_data->scratch[3] = REG_READ(DMCUB_SCRATCH3); in dmub_dcn20_get_diagnostic_data()
433 diag_data->scratch[4] = REG_READ(DMCUB_SCRATCH4); in dmub_dcn20_get_diagnostic_data()
434 diag_data->scratch[5] = REG_READ(DMCUB_SCRATCH5); in dmub_dcn20_get_diagnostic_data()
435 diag_data->scratch[6] = REG_READ(DMCUB_SCRATCH6); in dmub_dcn20_get_diagnostic_data()
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H A Ddmub_dcn31.c87 uint32_t in_reset, scratch, i, pwait_mode; in dmub_dcn31_reset() local
111 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn31_reset()
112 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) in dmub_dcn31_reset()
423 diag_data->scratch[0] = REG_READ(DMCUB_SCRATCH0); in dmub_dcn31_get_diagnostic_data()
424 diag_data->scratch[1] = REG_READ(DMCUB_SCRATCH1); in dmub_dcn31_get_diagnostic_data()
425 diag_data->scratch[2] = REG_READ(DMCUB_SCRATCH2); in dmub_dcn31_get_diagnostic_data()
426 diag_data->scratch[3] = REG_READ(DMCUB_SCRATCH3); in dmub_dcn31_get_diagnostic_data()
427 diag_data->scratch[4] = REG_READ(DMCUB_SCRATCH4); in dmub_dcn31_get_diagnostic_data()
428 diag_data->scratch[5] = REG_READ(DMCUB_SCRATCH5); in dmub_dcn31_get_diagnostic_data()
429 diag_data->scratch[ in dmub_dcn31_get_diagnostic_data()
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H A Ddmub_dcn32.c93 uint32_t in_reset, scratch, i; in dmub_dcn32_reset() local
119 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn32_reset()
120 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) in dmub_dcn32_reset()
432 diag_data->scratch[0] = REG_READ(DMCUB_SCRATCH0); in dmub_dcn32_get_diagnostic_data()
433 diag_data->scratch[1] = REG_READ(DMCUB_SCRATCH1); in dmub_dcn32_get_diagnostic_data()
434 diag_data->scratch[2] = REG_READ(DMCUB_SCRATCH2); in dmub_dcn32_get_diagnostic_data()
435 diag_data->scratch[3] = REG_READ(DMCUB_SCRATCH3); in dmub_dcn32_get_diagnostic_data()
436 diag_data->scratch[4] = REG_READ(DMCUB_SCRATCH4); in dmub_dcn32_get_diagnostic_data()
437 diag_data->scratch[5] = REG_READ(DMCUB_SCRATCH5); in dmub_dcn32_get_diagnostic_data()
438 diag_data->scratch[ in dmub_dcn32_get_diagnostic_data()
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H A Ddmub_dcn35.c92 uint32_t in_reset, is_enabled, scratch, i, pwait_mode; in dmub_dcn35_reset() local
116 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn35_reset()
117 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) in dmub_dcn35_reset()
475 diag_data->scratch[0] = REG_READ(DMCUB_SCRATCH0); in dmub_dcn35_get_diagnostic_data()
476 diag_data->scratch[1] = REG_READ(DMCUB_SCRATCH1); in dmub_dcn35_get_diagnostic_data()
477 diag_data->scratch[2] = REG_READ(DMCUB_SCRATCH2); in dmub_dcn35_get_diagnostic_data()
478 diag_data->scratch[3] = REG_READ(DMCUB_SCRATCH3); in dmub_dcn35_get_diagnostic_data()
479 diag_data->scratch[4] = REG_READ(DMCUB_SCRATCH4); in dmub_dcn35_get_diagnostic_data()
480 diag_data->scratch[5] = REG_READ(DMCUB_SCRATCH5); in dmub_dcn35_get_diagnostic_data()
481 diag_data->scratch[ in dmub_dcn35_get_diagnostic_data()
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H A Ddmub_dcn401.c67 uint32_t in_reset, scratch, i; in dmub_dcn401_reset() local
93 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn401_reset()
94 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) in dmub_dcn401_reset()
417 diag_data->scratch[0] = REG_READ(DMCUB_SCRATCH0); in dmub_dcn401_get_diagnostic_data()
418 diag_data->scratch[1] = REG_READ(DMCUB_SCRATCH1); in dmub_dcn401_get_diagnostic_data()
419 diag_data->scratch[2] = REG_READ(DMCUB_SCRATCH2); in dmub_dcn401_get_diagnostic_data()
420 diag_data->scratch[3] = REG_READ(DMCUB_SCRATCH3); in dmub_dcn401_get_diagnostic_data()
421 diag_data->scratch[4] = REG_READ(DMCUB_SCRATCH4); in dmub_dcn401_get_diagnostic_data()
422 diag_data->scratch[5] = REG_READ(DMCUB_SCRATCH5); in dmub_dcn401_get_diagnostic_data()
423 diag_data->scratch[ in dmub_dcn401_get_diagnostic_data()
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/linux/net/xfrm/
H A Dxfrm_ipcomp.c44 u8 *scratch = *this_cpu_ptr(ipcomp_scratches); in ipcomp_decompress() local
46 int err = crypto_comp_decompress(tfm, start, plen, scratch, &dlen); in ipcomp_decompress()
62 skb_copy_to_linear_data(skb, scratch, len); in ipcomp_decompress()
64 while ((scratch += len, dlen -= len) > 0) { in ipcomp_decompress()
82 memcpy(skb_frag_address(frag), scratch, len); in ipcomp_decompress()
129 u8 *scratch; in ipcomp_compress() local
133 scratch = *this_cpu_ptr(ipcomp_scratches); in ipcomp_compress()
135 err = crypto_comp_compress(tfm, start, plen, scratch, &dlen); in ipcomp_compress()
144 memcpy(start + sizeof(struct ip_comp_hdr), scratch, dlen); in ipcomp_compress()
221 void *scratch; in ipcomp_alloc_scratches() local
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/linux/arch/x86/include/asm/
H A Dbootparam_utils.h52 static struct boot_params scratch; in sanitize_boot_params() local
54 char *save_base = (char *)&scratch; in sanitize_boot_params()
68 BOOT_PARAM_PRESERVE(scratch), in sanitize_boot_params()
80 memset(&scratch, 0, sizeof(scratch)); in sanitize_boot_params()
/linux/drivers/usb/host/
H A Dehci-dbg.c373 u32 scratch; in qh_lines() local
396 scratch = hc32_to_cpup(ehci, &hw->hw_info1); in qh_lines()
401 qh, scratch & 0x007f, in qh_lines()
402 speed_char (scratch), in qh_lines()
403 (scratch >> 8) & 0x000f, in qh_lines()
404 scratch, hc32_to_cpup(ehci, &hw->hw_info2), in qh_lines()
420 scratch = hc32_to_cpup(ehci, &td->hw_token); in qh_lines()
426 } else if (QTD_LENGTH(scratch)) { in qh_lines()
432 switch ((scratch >> 8) & 0x03) { in qh_lines()
450 (scratch >> 1 in qh_lines()
596 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1); output_buf_tds_dir() local
761 char *next, scratch[80]; fill_registers_buffer() local
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/linux/drivers/media/platform/sunxi/sun4i-csi/
H A Dsun4i_dma.c96 dma_addr_t addr = csi->scratch.paddr; in sun4i_csi_setup_scratch_buffer()
255 csi->scratch.size = 0; in sun4i_csi_start_streaming()
257 csi->scratch.size += csi->fmt.plane_fmt[i].sizeimage; in sun4i_csi_start_streaming()
259 csi->scratch.vaddr = dma_alloc_coherent(csi->dev, in sun4i_csi_start_streaming()
260 csi->scratch.size, in sun4i_csi_start_streaming()
261 &csi->scratch.paddr, in sun4i_csi_start_streaming()
263 if (!csi->scratch.vaddr) { in sun4i_csi_start_streaming()
336 dma_free_coherent(csi->dev, csi->scratch.size, csi->scratch.vaddr, in sun4i_csi_start_streaming()
337 csi->scratch.paddr); in sun4i_csi_start_streaming()
364 dma_free_coherent(csi->dev, csi->scratch.size, csi->scratch.vaddr, in sun4i_csi_stop_streaming()
[all …]
/linux/tools/testing/selftests/powerpc/copyloops/asm/
H A Dppc_asm.h50 #define DCBT_SETUP_STREAMS(from, from_parms, to, to_parms, scratch) \ argument
51 lis scratch,0x8000; /* GO=1 */ \
52 clrldi scratch,scratch,32; \
60 dcbt 0,scratch,0b01010; /* all streams GO */
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_workarounds.c503 struct i915_vma *scratch; in check_dirty_whitelist() local
509 scratch = __vm_create_scratch_for_read_pinned(ce->vm, sz); in check_dirty_whitelist()
510 if (IS_ERR(scratch)) in check_dirty_whitelist()
511 return PTR_ERR(scratch); in check_dirty_whitelist()
522 u64 addr = i915_vma_offset(scratch); in check_dirty_whitelist()
540 err = i915_gem_object_lock(scratch->obj, &ww); in check_dirty_whitelist()
554 results = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); in check_dirty_whitelist()
604 GEM_BUG_ON(idx * sizeof(u32) > scratch->size); in check_dirty_whitelist()
635 err = i915_vma_move_to_active(scratch, rq, in check_dirty_whitelist()
730 i915_gem_object_unpin_map(scratch->obj); in check_dirty_whitelist()
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